CPU Lead Performance Architect, Silicon

Google • Portland, OR

13h • $183,000 - $271,000

About The Position

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Lead CPU Performance Architect in architecture and performance, you will be the key contributor to improve processor instruction set architecture, to develop innovative micro-architecture features, and deliver Google’s advanced SoC products. You will have the opportunity to collaborate with talents in Google’s Android applications and Google’s Artificial Intelligence (AI) teams to plan and conduct application and benchmark performance analysis, and to project their performance at various design phases.

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 10 years of experience in high-performance microprocessor architecture, micro-architecture, performance, and design.
• Experience in C/C++ and scripting languages.
• Experience in performance modeling, analysis, correlation, and workload characterization.
• Experience with high-performance CPU architecture.

Nice To Haves

• PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• Experience leading CPU/ML micro-architecture exploration, performance model development, performance analysis, performance correlation, and workload characterization.
• Knowledge of Android system software components, AI/ML.
• Familiarity with Advanced RISC Machine's architecture including all its extensions such as SME.

Responsibilities

• Deliver solutions to problems, including Central Processing Unit (CPU) performance, micro-architecture design, tool infrastructure, and methodology.
• Plan, drive, and evaluate Advanced RISC Machine's (ARM's) architecture features from both architecture and performance angles.
• Define and write CPU subsystem architecture specifications.
• Lead the collaboration with RTL, design verification, and physical design teams to develop CPU implementation.
• Drive performance correlation between the performance model and RTL implementation, and perform pre-silicon and post-silicon performance bug triage.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees