CPU DFT Engineer

QualcommSanta Clara, CA
2d

About The Position

As a DFT Engineer you will work with chip architects, chip designers, implementation engineers and test engineers to verify the DFT and DFD (Design for Debug) architecture, implementation, and test plans for both mixed signal and digital VLSI designs. Then you’ll insure it becomes reality. We’re doing a ground up implementation of a new chip architecture, so you’ll have to ability to affect a new design.

Requirements

  • BA/BS degree in Electrical/Computer Engineering with 5+ years of practical experience
  • Strong fundamentals in digital ASIC design; experience using Verilog or VHDL
  • Experience with ASIC test, DFT, and debug
  • 3+ years of practical experience with test or DFT
  • Experience using the Mentor Tessent tools
  • Experience with defining and implementing SOC level verification on large designs.
  • Experience in TCL, Perl/Python and Shell scripting
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 1+ year of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
  • PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.

Nice To Haves

  • Hands-on expertise with commercial test generation tools for large complex designs
  • Strong fundamental knowledge of DFT techniques include JTAG, ATPG, test pattern translation, yield learning, logic diagnosis, scan compression, IEEE 1500 Standard, and MBIST, LBIST
  • Experience running test compression software
  • Strong sense of ownership, self-driven

Responsibilities

  • Create test vectors or oversee their creation
  • Validate DFT requirements are being met
  • Work with designers to increase test coverage, debug observability and flexibility
  • Verify post-PD designs meet DFT requirements
  • Work with test personnel, stepping in to do run tests when needed

Benefits

  • We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.

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What This Job Offers

Job Type

Full-time

Career Level

Mid Level

Number of Employees

5,001-10,000 employees

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