Camera DV Engineer (Multiple locations/Multiple Levels)

Qualcomm•San Diego, CA

About The Position

At Qualcomm, we invent breakthrough technologies that transform how the world connects, computes, and communicates. You interact with products and technologies made possible by Qualcomm every day. Qualcomm is a Technology Platform company known worldwide for its Snapdragon platform providing solutions in Wireless connectivity and Multimedia along with Compute, IoT, Automotive and AI - and this is where you come in as a Design Verification Engineer in the Snapdragon Sight team. Camera Image processing has evolved to become an integral part of our daily life creating everlasting connected memories and assisting innovative devices through human and computer vision technologies. - Mobile: Capturing DSLR like quality images on your Mobile devices. - Automotive: Accelerating the digital transformation through Snapdragon digital chassis by powering the Snapdragon Ride for ASIL compliant ADAS solutions and Snapdragon Cockpit for in-car virtual assistance, contextual safety use cases and advanced graphics and multimedia. - AR/VR: Reimagining reality as we know it by enabling Immersive realism & 360 video while preserving battery life. - IoT: Connecting the cities of future with Qualcomm Technologies’ smart city solutions - Compute: Collaborate from virtually anywhere with extraordinary battery life. Snapdragon® Sight powers all the diverse platform solutions provided by Qualcomm. Our team delivers the Camera ISP to majority of Android Eco-system Smartphones, AR/VR and IOT devices, provides Imaging & vision solutions for automotive platforms across ADAS & infotainment applications to world-wide Automotive manufacturers. It's an opportunity to be part of the team that creates highly advanced/specialized Camera ISPs and consistently ranks as the best Imaging solution. Join us for a limitless opportunity to learn, grow and lead the world of Imaging and design verification. Team is open to hiring across levels and across multiple locations - San Diego/Santa Clara/Austin/Irvine.

Requirements

Bachelor's degree in Engineering, Science, or a closely related field with 3 - 9 years of experience
Experience with design verification defining test plans, developing verification infrastructure using OOP and execution of defined test plans to meet required Metrics of Closure
Expertise with Hardware verification languages (HVL) such as System Verilog testbench (OVM/UVM)
Development of Directed and Constrained Random stimulus
Strong Digital Design concepts and debugging skills with expertise in traversing Verilog/System-Verilog RTL
Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
OR
Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 3+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
OR
PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field and 2+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.

Nice To Haves

Master’s degree in engineering, Science, or a closely related field with 1 - 7 years of experience
Good understanding of Object-Oriented Programming (OOP) concepts
Exposure to Formal flows
Programming proficiency - HDL, HVL, system Verilog/UVM, C/C++
Scripting proficiency - Perl, Python, TCL, Shell
Experience with Verification of Complex IP/Subsystem/SOC with exposure to End-to-end verification methodologies
Excellent written and verbal communication skills to work in a collaborative environment with geographically distributed teams
Experience with simulation acceleration and emulation platforms is a plus

Responsibilities

Engage in Technical discussions across the multiple cross-functional teams
Systems team: participate in Algorithm development and review / influence optimal imaging solutions
Design & Architects: engage & review specifications and data flows
Software & Firmware team: collaborate towards end-to-end product development
Implement new or increment test benches to adapt to new requirements by extensively applying object-oriented concepts & UVM methodology
Write parameterized & scalable verification plans
Write complex constraints and sequences to create corner case Algorithm and pipeline tuning scenarios
Verify functionality as well as Use-Case Power & Performance KPI's are met.
Use Simulation/Formal/Assertion/Emulation flows to close on Functional and Code coverages
Debug complex issues across multiple verification platforms