CAD Infrastructure Intern

Rambus • San Jose, CA

1d • Hybrid

About The Position

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional CAD Engineering Intern to join our Central CAD Team. Selected candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.
As a CAD Engineering Intern, the candidate will be reporting to the Director of CAD. In this role the candidate will be working on CAD tool, flow and methodology development and support for a world-wide design team working on advanced process technology nodes. The CAD team is spread globally across the US and India and supports EDA (electronic design automation) software, EDA infrastructure, design flows/methodologies, and design automation for world-wide design teams working on cutting edge product chips designs for memory interface chips, interconnect chips and silicon IP designs.
Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work

Requirements

• Currently pursuing a Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, Computer Engineering, or a related field.
• Strong hands‑on software development and automation experience, with demonstrated ability to write high‑quality, well‑structured, and maintainable code, using Python (preferred) and/or Tcl, Shell, Perl, or similar languages.
• Familiarity with Linux/Unix environments.
• Basic understanding of semiconductor chip design and verification workflows, gained through coursework, academic projects, or internships.
• Exposure to electronic design automation (EDA) tools from software vendors such as Synopsys, Cadence, or Siemens, through academic or industry project work.
• Interest in compute infrastructure, job scheduling, or shared resource environments, including concepts such as throughput, turnaround time, and utilization.
• Strong analytical and problem‑solving skills, with the ability to learn new tools and technologies quickly.
• Good communication skills and ability to work effectively with CAD, IT, design, and verification engineers in a team environment.

Responsibilities

• Develop and support software utilities and automation, using Python, Tcl, Shell, or similar languages, to improve compute job throughput, turnaround time (TAT), and overall compute efficiency.
• Utilize the IBM LSF job scheduler to support and optimize job scheduling in on-premise data center and/or compute cloud environments.
• Work on electronic design automation (EDA) software license usage analysis and optimization, including improving license sharing efficiency and reducing tool contention in a shared global environment.
• Assist with monitoring, reporting, and analysis of infrastructure metrics, such as LSF job queue wait time, run time, resource utilization, and license consumption.
• Support LSF scheduler configurations and workflows to improve utilization of shared computing resources.
• Collaborate with CAD, IT, design, and verification teams to identify infrastructure bottlenecks and help develop scalable solutions.
• Support infrastructure used by chip design and verification workflows, including circuit simulation, logic synthesis, physical design, and design verification using EDA tools.
• This role will include assigned tasks and responsibilities related to CAD infrastructure and automation, with a strong focus on enabling high design productivity, fast time-to-market, and efficient use of EDA software tools and compute hardware resources.

Benefits

• Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership.

What This Job Offers

• Career Level: Intern