CAD Infrastructure Engineer

Rambus • San Jose, CA

1d • Hybrid

About The Position

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional CAD Infrastructure Engineer to join our Central CAD Team. Selected candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.
As a CAD Infrastructure Engineer, the candidate will be reporting to the Director of CAD. In this role the candidate will be working on CAD tool, flow and methodology development and support for a world-wide design team working on advanced process technology nodes. The CAD team is spread globally across the US and India and supports EDA (electronic design automation) software, EDA infrastructure, design flows/methodologies, and design automation for world-wide design teams working on cutting edge product chips designs for memory interface chips, interconnect chips and silicon IP designs.
Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work.
Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems.

Requirements

• BSEE or equivalent degree in Electrical Engineering, Computer Science, or a related field, with 5+ years of relevant industry experience in CAD, EDA infrastructure, or engineering workflow automation.
• Strong hands‑on software development and automation experience, with proficiency in Python (preferred) and experience with one or more of the following: Perl, Tcl, C‑Shell, Makefile, and/or C++. Demonstrated ability to develop robust, maintainable, and production‑quality utilities and infrastructure‑level automation.
• Working knowledge of semiconductor design and verification workflows, with practical exposure to electronic design automation (EDA) tools from vendors such as Synopsys, Cadence, and Siemens, gained through industry experience or advanced academic project work.
• Proven ability to quickly understand complex CAD workflows and apply software and systems expertise to optimize performance, scalability, and reliability in shared compute and EDA environments.

Responsibilities

• Work as part of a computer-aided design (CAD) team that architects, develops, and delivers software tools and workflows that are critical to Rambus’s advanced chip design and verification.
• Own the development, support, and continuous improvement of CAD infrastructure in a global environment with multiple chip design teams and heavily shared computing resources.
• Design, configure, and optimize LSF queues and policies to maximize chip design job throughput, minimize turnaround time (TAT), and improve overall efficiency of shared compute and EDA license resources, leveraging advanced scheduling capabilities such as fairshare, preemption, and prioritization.
• Drive and implement automation around LSF and EDA infrastructure to provide clear visibility into utilization of key resources (compute, memory, licenses), including demand-vs-supply gaps, bottlenecks, and efficiency trends.
• Define, implement, and maintain CAD infrastructure health monitoring and dashboards to proactively detect, diagnose, and prevent performance, capacity, or reliability issues before they impact design teams.
• Collaborate closely with IT and infrastructure partners to define requirements, influence architecture decisions, and recommend compute resource configurations that best support LSF workloads and EDA usage patterns.
• Provide backup and escalation support for compute cluster operations, including LSF host group and queue management, upgrades, configuration changes, and overall resource governance.
• Identify and drive cross-team workflow improvements that measurably improve design productivity, predictability, and tool availability.

Benefits

• Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level