ASIC Verification Engineer

Lumiere Systems • Edison, NJ

12h • Remote

About The Position

This is a core Engineering Role focused on ASIC Verification. The position involves assuring the overall quality of designs for wireless portable hardware, with a strong emphasis on ARM IPs such as Cortex-A v9 architecture CPUs, Mali GPUs, and debug components like CSS600 and CoreSight. The role requires reviewing architectural/design decisions and ramping up on the verification of these blocks. The candidate can be located anywhere in the USA but must work in the EST time zone and may be required to travel to Paris quarterly for one week based on client needs. The duration of the role is 12 months.

Requirements

• Experience in CortexA9
• Experience in SoCs based on both Cortex‑A and Cortex‑M families
• Experience in Cortex‑A9 including multi‑core MMU‑based systems, shared L2 and private L1 cache hierarchies, cache coherency validation, AXI/APB interconnects, DMA, interrupts, power states, and CoreSight/JTAG‑based debug, all implemented in full UVM environments using golden‑model–driven tests and ARM VIP for stress traffic
• Experience in Cortex‑M4 and Cortex‑M55–based SoCs, focusing on low‑power architectures, independent cores, measurement flows, and power management
• Strong end‑to‑end view from ultra‑low‑power microcontroller designs to high‑performance application processors
• Proven (5+ years) hands-on experience with state-of-the-art verification methodologies and processes, such as UVM / SystemVerilog, Formal verification, Constraint-random verification, Assertions, Coverage metrics, Coverage analysis, Gate Level Simulation, Key Performance Indicators testing
• Strong understanding of ARM related IPs: cpu (cortex-a v9 arch), gpu (mali), debug (css600, coresight)
• Hands-on experience with designing and implementing C based test-cases to configure and test the ARM IPs
• Ability to re-use the manufacturer provided test benches

Nice To Haves

• Knowledge of French language
• Experience with newer version of cortex

Responsibilities

• Serve as an individual contributor to own and develop the verification of our core IP blocks
• Ownership throughout the whole project lifecycle, e.g.: Specification reviews, Verification plans, test case development, UVM environments, Coverage (analysis), Debugging, GLS, etc.
• Work closely with other teams to gather relevant information and share your knowledge about the design to further improve requirements and specifications. As well as providing vital feedback in their debugging efforts
• Collaborate with the global verification team to improve our processes and launch initiatives to improve the overall quality of the design as well as the way of working to become the best in class verification team

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: No Education Listed