ASIC Design Verification Engineer
Qualcomm•Santa Clara, CA
•Onsite
About The Position
Qualcomm-Atheros is a leading provider of wireless and wired technologies for the mobile, networking, computing and consumer electronics markets, focused on inventing technologies that connect and empower people. Qualcomm Atheros' teams deliver cutting-edge products across every established wireless standard/protocol. This position involves the implementation of optimum system architectures, interfaces and logics for connectivity RF/Analog system, participating in the development of leading-edge ASICs for multi-function mobile platforms.
Requirements
- Bachelor's degree in Science, Engineering, or related field
- Knowledge of wireless LAN, Bluetooth, and RF transceiver
Nice To Haves
- RTL Design
- ASIC front-end experience
- Scripting Languages knowledge (e.g. Perl or Python)
Responsibilities
- Participate in development of leading-edge ASICs for multi-function mobile platforms
- Work with engineers or develop unit-level and integrated-level test benches
- Assist in synthesis and gate-level simulation tasks related to your module
- Assist with timing of the entire chip
Benefits
- Competitive annual discretionary bonus program
- Opportunity for annual RSU grants
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What This Job Offers
Job Type
Full-time
Career Level
Entry Level
Number of Employees
5,001-10,000 employees
