You will be part of the Silicon One development organization as an ASIC implementation engineer in San Jose, CA. As a member of this team you will be involved in crafting cutting edge next generation networking chips. You will be the lead to drive the DFT/DFx and quality process through the early product life cycle: the architecture definitions, RTL implementation and quality checks. You will also be engaged in relevant development of flow/methodologies, test plans, tape-out sign-off requirements, post silicon validation, production yield & DPPM support.
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Job Type
Full-time
Career Level
Mid Level
Industry
Professional, Scientific, and Technical Services
Number of Employees
5,001-10,000 employees