ASIC Digital Design Engineer

General Dynamics Mission Systems, Inc • Salt Lake City, UT

1d

About The Position

General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!

ROLE AND POSITION OBJECTIVES:
What You’ll Get to Do:
Collaborate with team leaders to explore and clearly identify real problems and solutions.
Refine and improve the microarchitecture of the IP to optimize performance, I/O, power consumption, area utilization, recurring cost and security functions.
Implement and simulate IP blocks in RTL using SystemVerilog, VHDL, and other languages.
Integrate complex systems that instantiate both the organization's and third party IP.
Contribute to all aspects of design success from specification to production.
Apply our state-of-the-art IP to ASIC and FPGA products in the real world.
Use high-quality design methods and processes to achieve excellent results.

Requirements

• Requires a Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering, Technology or Mathematics field.
• Also requires 2+ years of job-related experience, or a Master's degree and 6 months of job-related experience.
• Ability to obtain a Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.
• Solid technical understanding of FPGA or ASIC product development
• with SystemVerilog, VHDL, and Test-Driven Development principles
• Ability to communicate clearly in person and in written documentation
• Degree in Computer Engineering, Computer Science, Electrical Engineering or related field

Responsibilities

• Collaborate with team leaders to explore and clearly identify real problems and solutions.
• Refine and improve the microarchitecture of the IP to optimize performance, I/O, power consumption, area utilization, recurring cost and security functions.
• Implement and simulate IP blocks in RTL using SystemVerilog, VHDL, and other languages.
• Integrate complex systems that instantiate both the organization's and third party IP.
• Contribute to all aspects of design success from specification to production.
• Apply our state-of-the-art IP to ASIC and FPGA products in the real world.
• Use high-quality design methods and processes to achieve excellent results.

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level