ASIC Design Intern

Groq, Inc.-posted 23 days ago
$30 - $50/Yr
Full-time • Intern
Hybrid • Palo Alto, CA
251-500 employees
Professional, Scientific, and Technical Services
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Mission: This position will focus on developing design scripts to automate design integration and regression of Groq's next generation hardware. This position will also help designers to improve functional test coverage. Through this work term, the successful candidate will be part of the Hardware engineering team and gain a detailed understanding of Groq's unique chip architecture.

  • Develop design scripts for design integration
  • Build scripts for design regression & management
  • Work with the designers to improve functional coverage
  • Write and debug ASIC block-level test cases
  • Gain micro-architecture and logic design skills
  • Work closely with our Design Verification and Physical Design teams
  • Learn how to review timing, lint and clock domain crossing reports
  • Experience with system verilog or verilog design languages
  • Understanding of ASIC design flows
  • Excellent written and verbal communication skills
  • Must be authorized to work in the United States or Canada
  • Preferred languages: System Verilog, Python, C, shell scripting
  • Purposeful Hiring: You're not here by accident, and neither is anyone else. Every teammate is handpicked with intention because who we build with matters.
  • Builders Wanted: You're not just riding the rocket ship, you're building it. Your work directly shapes the trajectory of our company.
  • Mission-Driven Work: We're here to make a real impact. Our mission fuels everything we do.
  • Tackling Hard Problems: If easy isn't your thing, you're in the right place. We solve some of the most complex and exciting challenges in our space.
  • Excellence Is The Standard: High performance isn't just encouraged, it's the baseline. And it's contagious.
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