ASIC Design and Integration Engineer

Apple • Cupertino, CA

6h

About The Position

Apple’s Silicon Engineering team is looking for a highly skilled and motivated
ASIC Design Engineer to join our dynamic group. In this role, you will develop
custom SoCs that drive the performance and efficiency of Apple’s products. You
will work on cutting-edge technologies and collaborate with cross-functional
teams to deliver groundbreaking solutions.

DESCRIPTION

Design and Development: Design, implementation, and verification of complex
ASICs. Develop RTL using SystemVerilog and perform synthesis. Verification:
Engage with simulation-based and formal verification teams to ensure robust
design validation. Integration and Testing: Collaborate with hardware and
software teams to integrate digital designs into complex SoCs. Timing and Power
Analysis: Conduct timing analysis and power optimization to achieve PPA goals.
Documentation and Reporting: Create detailed micro-architecture and design
documentation.

Requirements

• Minimum of BS +10 years relevant industry experience

Nice To Haves

• 8+ years of proven experience in ASIC design, including RTL design and verification
• Hands-on experience with ASIC design tools and methodologies is essential
• Proficiency in SystemVerilog, RTL design, synthesis, and timing analysis
• Strong analytical and problem-solving skills
• Excellent communication and teamwork skills, work effectively in cross-functional teams
• Experience with high-speed networking is a plus
• Familiarity with custom ASIC design and FPGA prototyping
• Hands on experience in all aspects of front-end chip development process (e.g., CDC/RDC, LINT, LEC, etc.)
• Knowledge of low-power design techniques and power optimization strategies

Responsibilities

• Design, implementation, and verification of complex ASICs
• Develop RTL using SystemVerilog and perform synthesis
• Engage with simulation-based and formal verification teams to ensure robust design validation
• Collaborate with hardware and software teams to integrate digital designs into complex SoCs
• Conduct timing analysis and power optimization to achieve PPA goals
• Create detailed micro-architecture and design documentation

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees