Amazon-posted 21 days ago
$50 - $102/Yr
Full-time • Intern
Onsite • Seattle, WA

Amazon internships across all seasons are full-time positions, and interns should expect to work on-site in office, Monday-Friday, up to 40 hours per week typically between 8am-5pm. Specific team norms around working hours will be communicated by your manager. Interns should not have conflicts such as classes or other employment during the Amazon work-day. Applicants should have a minimum of one quarter/semester/trimester remaining in their studies after their internship concludes. By applying to this position, your application will be considered for all ASIC roles at all locations we hire for in the United States including but not limited to: Greater Seattle Area (Seattle, Bellevue, Redmond), Greater Bay Area (San Francisco, Sunnyvale, Santa Clara), Greater DMV (DC, MD, VA), Austin (TX), New York City (NY), Minneapolis (MN). You will be able to provide your preference of location and start date during the application process but, we cannot guarantee that we can meet your selection based on several factors including but not limited to the availability and business needs of this role. Finalization on the location and start dates available will be provided to you at the time of job offer. As an ASIC Engineer Intern you will engage with an experienced cross-disciplinary staff to conceive and design innovative consumer products. You will work closely with an internal inter-disciplinary team, and outside partners to drive key aspects of product definition, execution, and verification. You must be responsive, flexible and able to succeed within an open collaborative peer environment.

  • Participate in logic design, verification and post-silicon validation as part of Amazon custom silicon solutions.
  • Work with physical design teams to achieve performance and area requirements.
  • Develop a deep understanding of the end customer requirements, including software applications, use models, system architecture and the SoC architecture/micro-architecture of our solutions.
  • Develop and execute design automation mechanisms and flows.
  • Are 18 years of age or older
  • Work 40 hours/week minimum and commit to 12 week internship maximum
  • Can relocate to where the internship is based
  • Experience in RTL coding and debug, as well as performance, power, area analysis and trade-offs
  • Experience in C/C++ and system Verilog coding
  • Knowledge of schematic design and debug skills
  • Currently working towards a Bachelor’s or Master's Degree in Electrical Engineering, Computer Engineering, Systems Engineering, or other equivalent technical discipline, with an expected conferral date between October 2026 - September 2029
  • Are enrolled in a Master's degree
  • Experience that includes strong analytical skills, attention to detail, and effective communication abilities
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