Analog Layout Engineer
About The Position
Join Apple's Silicon Engineering Group (SEG) and be at the forefront of shaping the next generation of Apple's systems-on-chip (SOCs)! Our SOCs, featuring multi-billion transistors, are the heart of iconic devices like iPhones, iPads, and Macs. We're seeking a highly skilled Analog Layout Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation and leveraging AI/ML techniques for improved design and efficiency.As a Senior Layout Lead, you'll play a crucial role in translating design concepts into silicon, collaborating closely with circuit designers, and using advanced tools, including AI-powered CAD solutions. You will craft sophisticated custom analog and mixed-signal layouts that optimize the performance of world-class products, review floor plans, analyze intricate circuits, and run full suites of design-verification tools. In this dynamic environment, you'll plan and coordinate layout tradeoffs, interpret LVS/DRC/ERC reports to drive timely and high-quality closure, and work with multidisciplinary teams to deliver next-generation SOCs. You'll also identify and implement opportunities for automation, developing scripts, creating efficient workflows, and exploring AI/ML techniques, to continually enhance layout quality, efficiency, and innovation. This job is right for you if you are a self-motivated engineer passionate about working with cutting-edge technology. You want to accelerate career growth, thrive in a results-oriented environment, and contribute to the development of revolutionary Apple products. The roles include crafting upcoming products, challenging oneself, and broadening skills in a dynamic, innovative work culture.
Requirements
- 10+ years of experience in analog/mixed-signal layout design, with a focus on deep submicron CMOS circuits and at least 3+ years in FinFET technologies.
- Strong programming/scripting knowledge in SKILL, Perl, TCL, Shell, and/or Python. Emphasis on using these skills for layout automation and data analysis.
- Familiar with Machine Learning and AI concepts and their application to layout optimization, verification, and design space exploration.
- Demonstrated ability to automate layout tasks and workflows using scripting and other tools.
- Proven expertise in implementing analog layout designs, achieving tight matching, low noise, and low power consumption.
- Must recognize failure-prone circuit and layout structures, have experience with analog and DFM best practices, and be able to identify the best approach to solving problems.
- High proficiency in custom and standard cell-based floor-planning and hierarchical layout assembly.
- Technical understanding of IR drop, RC delay, electromigration, self-heating, and coupling capacitance.
- High proficiency in interpreting physical verification reports (DRC, ERC, LVS, etc.).
- Experience using Cadence Virtuoso's advanced features (XL, EAD, APR, and Constraint Manager).
- Excellent communication skills and ability to work with cross-functional teams.
Nice To Haves
- Experience with AI/ML tools and techniques for layout optimization and analysis is a significant plus.
- Experience with Cadence Innovus
- CAD Automation experience
- PCell creation experience
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
Industry
Computer and Electronic Product Manufacturing
Education Level
No Education Listed
Number of Employees
5,001-10,000 employees
