AI Subsystems Physical Design Lead

Tenstorrent•Fort Collins, CO

16h•$100,000 - $500,000•Hybrid

About The Position

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a Physical Design Engineer to own timing for subsystems in an AI accelerator chip. You will collaborate with RTL designers during the exploration phase to assess buildability and PPA of micro-architectural features, develop timing constraints, and drive the transition to physical design implementation. Your responsibilities will include synthesis, place and route, timing analysis and closure, and power optimization. AI accelerators provide a wide design space, and you’ll play a key role in selecting micro-architecture design points that meet die-size and PPA goals This role is hybrid, based out of Austin,TX or Santa Clara, CA or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Requirements

BS/MS/PhD in EE/ECE/CE/CS with proven experience in synthesis, PnR, and timing closure on taped-out designs.
Expertise with industry-standard tools (Innovus, PrimeTime, RedHawk) and scripting languages (Tcl, Perl, Python).
Deep understanding of advanced node challenges and low-power design techniques (power gating, multi-Vt, voltage scaling).
Experience driving physical design requirements from early architecture through final signoff.