Wireless FPGA Prototype Design Engineer

Apple • CA

80d

About The Position

Would you like to join Apple’s growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient/low-power design and new technologies that transform the user experience at the product level, all of which is driven by a world class vertically integrated engineering teams. As a Wireless FPGA Prototype Design Engineer, you will be at the center of the silicon design group with a meaningful role getting functional products to millions of customers quickly. Wouldn’t you love a dynamic, yet challenging role as a Wireless FPGA Prototype Design Engineer here at Apple?

Requirements

• BS and 3+ years of relevant experience
• Experience in FPGA flow
• Knowledge of digital design, chip architecture and microarchitecture
• Experience in Scripting and modeling language experience (Shell, C, Python or Perl)
• Hands-on experience in lab equipment, hardware bring-up and debug in lab

Nice To Haves

• Strong background in computer architecture and wireless applications
• Expertise in one or more of the following areas: Bus fabric and peripherals, APB/AHB/AXI, USB, I2C, SPI and JTAG System debug architecture
• Familiar with AMD’s flow including design entry in Verilog, synthesis, place and route, timing constraints and timing closure
• Hands-on experience with lab equipment, such as JTAG, oscilloscope, logic analyzer and LitePoint
• Solid skill in problem solving, FW/HW development
• Experience with emulation platform, such as Palladium
• Excellent communication skills and self-motivation
• Ability to collaborate and drive production test/QA methodologies

Responsibilities

• Develop signal processing intensive design for wireless communication SoCs
• ASIC prototyping from requirement to implementation and lab debug
• FPGA synthesis, define timing constraints, timing closure
• Maintain common design platform for ASIC as well as FPGA, with considerations for memories, I/O pads, gated clocks and complex generated clocks
• Bring-up, debug and test FPGA/emulation model and collaterals in the lab
• Support pre-Silicon and post-silicon validation and collaborate

What This Job Offers

• Education Level: Bachelor's degree
• Number of Employees: 5,001-10,000 employees