Virtual Platform Engineer
About The Position
This role offers the opportunity to shape next‑generation AR/VR systems by developing the high‑fidelity virtual platforms that drive early software enablement and silicon innovation. You will model advanced SoC architecture and collaborate closely with architects, designers, and firmware teams to validate and optimize custom hardware. Your contributions will inform critical architectural decisions and accelerate delivery of high‑performance silicon that powers immersive, real‑world experiences. Build SystemC/TLM models representing SoC components including processors, DSPs, NoCs, DMA engines, memory controllers, and custom accelerators. Integrate internal and vendor IP into cohesive Virtual Platforms with automated workflows that ensure complete connectivity, register accuracy, and CI enablement. Collaborate with architects, designers, and verification teams to deliver fast, cycle‑approximate C++ models for first‑party IP. Support hardware programs by validating evolving SoC architectures with system software and firmware teams. Enhance virtual platforms with instrumentation for power, performance, and architectural trade‑off analysis.
Requirements
- Bachelor’s degree in computer science, Electrical Engineering, or equivalent experience.
- 7+ years of industry experience, including 5+ years in hardware modeling, virtual platforms, or SoC performance modeling.
- Expertise in modern C++ for chip‑design, EDA, simulation, and C++ concurrency (threads, atomics, memory ordering).
- Hands‑on experience with SystemC/TLM and virtual platform tools such as Synopsys Virtualizer, Cadence Virtual Platform, Imperas OVP, or ARM Fast Models.
- Strong understanding of processor/DSP architectures (ARM, RISC‑V, Xtensa), NoC/MMU/cache systems, and proficiency in Python for automation.
Responsibilities
- Build SystemC/TLM models representing SoC components including processors, DSPs, NoCs, DMA engines, memory controllers, and custom accelerators.
- Integrate internal and vendor IP into cohesive Virtual Platforms with automated workflows that ensure complete connectivity, register accuracy, and CI enablement.
- Collaborate with architects, designers, and verification teams to deliver fast, cycle‑approximate C++ models for first‑party IP.
- Support hardware programs by validating evolving SoC architectures with system software and firmware teams.
- Enhance virtual platforms with instrumentation for power, performance, and architectural trade‑off analysis.
Benefits
- Flexible work
- Healthcare including dental, vision, mental health, and well-being programs
- Financial well-being programs such as 401(k) and Employee Share Ownership Plan
- Paid time off and paid holidays
- Paid parental leave
- Family building benefits like adoption assistance, surrogacy, and cryopreservation
- Social well-being benefits like subsidized back-up child/elder care and tutoring
- Mentoring, coaching and learning programs
- Employee Resource Groups
- Disaster Relief
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
Number of Employees
5,001-10,000 employees
