Verification Engineer – AI SoC Development

Intel Corporation • Folsom, CA

1d • Hybrid

About The Position

Intel's AI SoC organization is building next-generation ASICs for AI applications across edge and cloud. As a Verification Engineer, you will be part of a dynamic team ensuring functional correctness of complex digital designs. If you are passionate about verification and eager to learn, this role offers abundant growth opportunities. You will perform functional logic verification of integrated SoCs to ensure designs meet specifications. This includes defining and developing scalable and reusable block, subsystem, and SoC verification plans, test benches, and verification environments to meet required coverage levels and confirm to microarchitecture specifications. You'll execute verification plans and define and run emulation and system simulation models to verify designs, analyze power and performance, and uncover bugs. Working in the presilicon environment, you'll replicate, root cause, and debug issues while finding and implementing corrective measures to resolve failing tests. Collaboration is essential as you'll work with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. You'll document test plans and drive technical reviews with design and architecture teams while incorporating security activities within test plans to ensure security coverage. Additionally, you'll maintain and improve existing functional verification infrastructure and methodology, absorb learning from postsilicon validation quality, update test plans for missing coverages, and proliferate improvements to future products.

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science
• 4+ years of experience in ASIC/SoC verification
• Ability to work in a fast-paced environment and adapt to changing requirements
• Strong problem-solving skills and eagerness to learn

Nice To Haves

• Knowledge of SystemVerilog and UVM methodology
• Understanding of digital design fundamentals and verification concepts
• Familiarity with EDA tools: simulators (VCS, Questa), coverage tools, and waveform debug
• Basic scripting skills (Python, Perl, TCL) for automation

Responsibilities

• Perform digital ASIC verification at block and system level
• Develop and execute test plans; write and review test sequences
• Build SystemVerilog testbench infrastructure (UVM and non-UVM) for functional verification
• Run regressions, analyze results, and drive code and functional coverage closure
• Collaborate with design teams to debug and resolve issues
• Contribute to pre-silicon verification, chip bring-up, and post-silicon validation
• Be a hands-on self-starter who can execute verification steps for complex designs

Benefits

• We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees