Timing Radio Integration Engineer

Apple • Irvine, CA

69d

About The Position

Do you have a passion for invention and self-challenge? Do you thrive on pushing the limits of what's considered feasible? As part of a world class modem team, you'll craft sophisticated groundbreaking embedded firmware that delivers more performance in our products than ever before. You'll work across fields to transform improved hardware elements into a single, integrated design. Join us, and you'll help us innovate new cellular technologies that continually outperform the previous iterations! The wireless Radio team architects, develops, and validates radio transceivers coordinated into sophisticated wireless SoCs. Our wireless organization is responsible for all aspects of wireless silicon development that transform the user experience at the product level. All of which is driven by an outstanding vertically coordinated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. As a Timing Radio Integration Engineer, you will be at the center of a wireless SoC design group with a critical impact on getting Apple's groundbreaking wireless connectivity solutions into hundreds of millions of products! As a Timing Integration Engineer, you will be a key member of the radio team, integrating and bringing the next-generation wireless SoCs into high-volume production at sophisticated CMOS technology nodes for Apple products.

Requirements

• MSEE with extensive experience in top radio level timing and digital verification.
• Solid digital background in RTL design, synthesis, and FE-STA.
• Understanding of ATPG and DFT support for SOC scan debug chains.

Nice To Haves

• Experience with analog modeling and netlist verification tools such as Insight Analyzer and SimVision.

Responsibilities

• Integrate and bring next-generation wireless SoCs into high-volume production.
• Work with digital teams to architect high-speed data paths and DSPs that communicate with RF and analog sub-cells.
• Evaluate digital radio blocks' power profiles using Digital Power Analysis tools such as PTPX.
• Support SOC scan debug chains and their timing to the radio sub-cells.
• Verify signal integrity and connectivity at the radio level using analog modeling and netlist verification tools.

What This Job Offers

• Industry: Computer and Electronic Product Manufacturing
• Education Level: Master's degree
• Number of Employees: 5,001-10,000 employees