As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. The infrastructure IP Team consists of a multi-disciplinary group involved in the definition and design of Platform infrastructure HW components such as Interconnect (NOC), System Cache, Memory controllers and System MMU that are implemented in all Qualcomm SoCs. This position primarily involves studying System Performance using cycle-accurate/approximate models and support both Infra IP level u-architecture optimizations as well as System level application performance verification. The ideal candidate should demonstrate the ability to understand the HW u-architecture of the Infrastructure components involved, in particular the memory system and interconnect, identify performance bottlenecks; define experiments and conduct data-driven performance analyses and debug using simulation; Ability to partner effectively with IP designers, Design Verification teams and System performance architects. This is a challenging position, working on most innovative technologies, surrounded by experts but also by users of our technology all over the world. You will contribute to evaluate performance of future envisioned hardware architectures and providing key data points to decision makers. You will participate to develop a key architecture modeling platform and support its continuous improvement.