Staff Test Development Engineer

Synaptics•Irvine, CA

32d•$123,000 - $194,700

About The Position

Synaptics is leading the charge in AI at the Edge, bringing AI closer to end users and transforming how we engage with intelligent connected devices, whether at home, at work, or on the move. As the go-to partner for the world's most forward-thinking product innovators, Synaptics powers the future with its cutting-edge Synaptics Astra™ AI-Native embedded compute, Veros™ wireless connectivity, and multimodal sensing solutions. We're making the digital experience smarter, faster, more intuitive, secure, and seamless. From touch, display, and biometrics to AI-driven wireless connectivity, video, vision, audio, speech, and security processing, Synaptics is the force behind the next generation of technology enhancing how we live, work, and play. Overview Synaptics is looking for a Staff Test Development Engineer to join our dynamic and growing organization. You will develop ATE solutions for complex Edge SoCs and Video interface products. This role will develop schematics and direct layout activities for ATE loadboards and probecards for new and innovative ICs. The Staff Test Development Engineer will develop and release robust production test solutions for offshore manufacturing and will support cost reduction activities such as test time reduction and yield improvement. This position reports to the Director, Test Development Engineering. The typical base pay range for this position is USD $123,000 - $194,700 per year. Individual pay is determined by many factors including work location, job-related skills, experience, and relevant education or training. This position is also eligible for a discretionary annual performance bonus, equity, and other benefits. Note that compensation listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.

Requirements

Bachelor's degree (Master's preferred) in Electrical Engineering, Electronics Engineering, or related field, or equivalent
8+ years of experience in test development for mixed-signal or RF semiconductor devices
Experience in creating PCB schematics for high-speed multi-site loadboards (package-level and wafer sort).
Experience with security key handling and programming in production environments.
Hands-on experience with lab equipment (power supplies, high-speed scopes, clock generators).
Proven track record in NPI development and manufacturing, including characterization, qualification, bring-up, yield improvement, and debug.
Ability to travel up to 10%
Experience with Teradyne UltraFLEX/uFlex and Advantest PS16000 ATE platforms
Proficiency in programming languages (VB, C, C++) and scripting (PERL)
Skilled with pattern conversion tools and methodologies
Deep understanding of high-speed digital interfaces (DP, HDMI, PCIe, DDR)
Expertise in high-speed PCB design and signal integrity concepts
Proactive, self-starter, able to work independently in a fast-paced environment to complete projects on time with minimal guidance
Well organized with strong attention to detail; proactively ensures work is accurate
Positive attitude and work ethic; unafraid to ask questions and explore new ideas
Resourceful and able to solve problems through adapting technology and a solid understanding of product architecture
Analytical and able to make informed decisions based on experience and data
Excellent communication and interpersonal skills, including the ability to communicate complex, interactive design concepts clearly to both technical teams and product level teams at the appropriate level of detail
Strong team player with the ability to work collaboratively within a diverse, geographically distributed cross-functional team

Responsibilities

Partner with design teams to review and define DFT requirements and develop comprehensive test plans
Develop characterization and mass production test hardware/software for high-speed SerDes and SoC ASICs using Advantest 93000/PS16000 and Teradyne UltraFLEX platforms
Collaborate with bench validation teams to establish correlation between ATE and bench measurements
Create and modify test patterns using bench test scripts; convert simulated patterns (WGL, STIL, VCD) into tester formats with industry-standard tools
Collect and analyze characterization data for new products; debug test setups and optimize wafer sort/final test programs
Drive yield improvement, test time reduction, and throughput optimization across production.
Design schematics and direct layout activities for ATE loadboards and probecards for innovative RF ICs (Bluetooth/WLAN)
Work closely with OSATs to release robust offshore production test solutions
Support cost-reduction initiatives through test efficiency and yield enhancement