Staff SOC Static Timing Analysis Engineer, Dojo

We are seeking a highly skilled and experienced Static Timing Analysis (STA) Engineer to join our dynamic team at Tesla. As an STA Engineer, you will play a critical role in the development of System-on-Chip (SoC) designs, ensuring the successful tape-out of complex integrated circuits. The ideal candidate will have a proven track record of delivering high-quality designs with an excellent understanding of micro-architecture, timing methodologies, and physical design concepts. Your expertise will be essential in performing static timing analysis and optimization to ensure design closure and meet performance requirements. In this role, you will collaborate with the design and physical implementation teams to develop timing constraints and methodologies for achieving optimal performance. You will conduct feasibility studies to evaluate design trade-offs and propose solutions to improve timing and power. Identifying and resolving timing issues, including setup and hold violations, clock domain crossing, and other timing-related problems will be a key part of your responsibilities. You will work closely with the verification team to analyze and resolve timing-related functional issues, ensuring that all aspects of the design meet the required specifications. Additionally, you will develop and maintain timing models and libraries for accurate and efficient timing analysis. Driving and supporting STA-related methodologies, flows, and tool enhancements to improve productivity and quality of results will be part of your daily tasks. Staying up to date with the latest industry trends and best practices in STA and related fields will be crucial for your success in this position. You should also have an understanding of ECO flows and eco generation methodologies, as well as experience with timing constraints development and validation.