Staff SOC Design Engineer

Qualcomm • Santa Clara, CA

3d

About The Position

This individual leads, plans, synthesizes ambiguous or conflicting requirements and performs the complex responsibility of leveraging advanced ASIC knowledge and experience to define, model, logic design, optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power products. Creates advanced architectures, logic design and specifications, and/or chip level simulations based on chip level requirements. Collaborates across functional teams (e.g., software architecture, hardware architecture, Systems, program management teams) to develop and execute an implementation strategy that meets system and product requirements. Evaluates all aspects of complex process flow from high-level design to synthesis, timing and power use cases, and verification of logic design. Utilizes tools/applications (e.g., Synopsys VCS, Synopsys Design Compiler) to execute and enable advanced architecture and design of multiple complex blocks/SoC for chip development. Writes and reviews detailed technical documentation for complex IP/ASIC projects. Develops module level design specifications based on the chip architecture specifications. Uses ASIC design tools/applications to design and implement subset of modules of the chip according to the design protocol provided in the architecture specification. Integrates multiple cores and intellectual property (IP) blocks into higher level design and supports cross-functional engineering teams. Executes the design and/or verification strategies of modules/IPs of an assigned part of a chip. Executes design checks on module level and interprets the results of the design checks. Resolves design issues during chip verification/validation. Assists in debugging RTL simulations. Participates in design and verification/validation reviews. Acts as a strong contributor at design reviews and project meetings and communicates and implements a development plan.

Requirements

• Master's Degree (or foreign academic equivalent) in Electrical Engineering, Computer Engineering, Computer Science or related degree field

Responsibilities

• Leads, plans, synthesizes ambiguous or conflicting requirements
• Leverages advanced ASIC knowledge and experience to define, model, logic design, optimize, verify, validate, implement, and document IP (block/SoC) development
• Creates advanced architectures, logic design and specifications, and/or chip level simulations based on chip level requirements
• Collaborates across functional teams to develop and execute an implementation strategy that meets system and product requirements
• Evaluates all aspects of complex process flow from high-level design to synthesis, timing and power use cases, and verification of logic design
• Utilizes tools/applications to execute and enable advanced architecture and design of multiple complex blocks/SoC for chip development
• Writes and reviews detailed technical documentation for complex IP/ASIC projects
• Develops module level design specifications based on the chip architecture specifications
• Uses ASIC design tools/applications to design and implement subset of modules of the chip according to the design protocol provided in the architecture specification
• Integrates multiple cores and intellectual property (IP) blocks into higher level design and supports cross-functional engineering teams
• Executes the design and/or verification strategies of modules/IPs of an assigned part of a chip
• Executes design checks on module level and interprets the results of the design checks
• Resolves design issues during chip verification/validation
• Assists in debugging RTL simulations
• Participates in design and verification/validation reviews
• Acts as a strong contributor at design reviews and project meetings and communicates and implements a development plan

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees