Staff Signoff Methodology Engineer

ARM • San Diego, CA

58d • Hybrid

About The Position

Arm is shaping the next generation of silicon design by combining computing, AI, and multiphysics to redefine how future SoCs are designed, implemented, and verified. Our Signoff Methodology Team develops intelligent, automated environments for timing, IR, thermal, and reliability analysis across advanced process nodes and emerging 2.5D/3D SoC integration technologies. This is a hands-on engineering role - you will write production-quality code, design automation flows, and integrate AI-driven techniques to advance the future of signoff methodology and intelligent silicon design.

Requirements

• 8-12 years of experience in SoC signoff or physical implementation methodology, including STA timing, reliability, and IR analysis, on advanced technology nodes.
• Strong programming and automation expertise in Python, TCL, or similar scripting languages.
• Deep understanding of timing closure, silicon correlation, and reliability modeling.
• Solid working knowledge of machine learning, statistical analysis, or AI-assisted flow development.
• Experience collaborating with EDA vendors on methodology development or feature enablement.

Nice To Haves

• M.S. or Ph.D. in Electrical Engineering, Computer Engineering, or a related field.
• Familiarity with innovative AI, including GenAI and LLM-based tools, for data-centric design automation.
• Strong problem-solving, algorithmic, and analytical thinking, with attention to scalability and reproducibility.
• Effective communication and technical leadership across multi-functional teams.

Responsibilities

• Develop and code advanced signoff and implementation methodologies to optimize power, performance, area (PPA), yield, and time-to-market.
• Design and standardize Static Timing Analysis (STA) and signoff features used across all Arm silicon groups.
• Architect and automate signoff methodologies for STA, thermal, IR, and reliability - optimized for multiphysics accuracy, runtime efficiency, and scalability across large SoCs.
• Build and maintain automation frameworks integrating machine learning and data analytics for predictive design closure.
• Collaborate with Arm silicon design teams and EDA partners to standardize and scale signoff methodologies across multiple technology nodes.
• Develop data pipelines and visualization tools to monitor and optimize PPA, reliability, and yield metrics.
• Drive innovation in signoff methodology for advanced process technologies, ensuring readiness for new multiphysics effects - including 3DIC integration, thermal, dynamic IR, and reliability modeling.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Industry: Professional, Scientific, and Technical Services
• Number of Employees: 5,001-10,000 employees