Staff Logic Design Engineer

Teledyne Technologies IncorporatedMilpitas, CA
1d

About The Position

Be visionary Teledyne Technologies Incorporated provides enabling technologies for industrial growth markets that require advanced technology and high reliability. These markets include aerospace and defense, factory automation, air and water quality environmental monitoring, electronics design and development, oceanographic research, deepwater oil and gas exploration and production, medical imaging and pharmaceutical research. We are looking for individuals who thrive on making an impact and want the excitement of being on a team that wins. Job Description Design and test FPGA circuitry for next generation Test and Measurement Tools Detailed Description: Define logic architecture of various blocks of the design Design these blocks using Verilog and verify their block level functionality through simulation Document the design and review with the rest of the team Drive FPGA tools to compile the code and ensure timing closure Verify proper operation of your circuit via system level test with test hardware Work with the verification engineer to validate your circuit in a whole chip simulation environment Work with customer support to reproduce and fix issues found in the field Reproduce customer environment to reproduce any failures found in the field Fix the RTL, recompile the FPGA and review the changes with the team

Requirements

  • BS in EE, CS or Computer Engineering required
  • MS in EE is a plus
  • Experience with one or more of the following protocols: PCIe, CXL, NVMe, USB, SAS, SATA
  • Experience with Monitoring and/or Test & Measurement tools
  • Knowledge in AMD-Xilix Vivado and RTL simulation
  • Strong interpersonal, organizational and communication skills
  • Experience at working both independently and in a team-oriented, collaborative environment is essential

Nice To Haves

  • MS in EE is a plus

Responsibilities

  • Define logic architecture of various blocks of the design
  • Design these blocks using Verilog and verify their block level functionality through simulation
  • Document the design and review with the rest of the team
  • Drive FPGA tools to compile the code and ensure timing closure
  • Verify proper operation of your circuit via system level test with test hardware
  • Work with the verification engineer to validate your circuit in a whole chip simulation environment
  • Work with customer support to reproduce and fix issues found in the field
  • Reproduce customer environment to reproduce any failures found in the field
  • Fix the RTL, recompile the FPGA and review the changes with the team
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