Staff IPT SIL Systems Engineer Lead

Northrop Grumman•Annapolis Junction, MD

55d•Onsite

About The Position

At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Northrop Grumman Microelectronics Center (NGMC) is seeking a Staff IPT SIL Systems Engineer Lead . What You'll Get to Do: Integrated Product Team (IPT) level role, member of Systems Engineering - Integration & Test (SEIT) Team, lead for System Integration Lab (SIL) Team - Lead the development of a hardware and software system integration lab for a segment of a complex multi-segment system that incorporates mature and emerging technologies. Develop strategies for rapid and continuous integration of new products and emerging technologies within the segment. Act as advocate - in partnership with system level SIL architect - for acceleration of capabilities that can enable early intra-segment and inter-segment partial integrations to de-risk major system development milestones and events. This position will serve on-site in the greater Baltimore, MD area. This position is contingent upon acquiring and maintaining the necessary US Government security clearance per customers' requirements.

Requirements

Bachelor's degree in a Science, Technology, Engineering, or Mathematics (STEM) discipline from an accredited university and 12 years of experience with Bachelor's degree, 10 years of experience with Master's degree, or 8 years of experience with PhD
Demonstrated experience with Systems Development Lifecycle
Demonstrated experience in systems development, integration, and test
Experience rapidly designing and implementing environments to support integration and testing of complex hardware and software systems
Understanding of hardware and software testing methodologies
Exposure to multi-disciplinary engineering teams (software, hardware, electrical) and strong ability to communicate cross functionally
Track record of customer problems/needs to innovative solutions
Risk and opportunity management experience
This position requires the applicant to be a U.S. citizen
Current Active DoD Secret Clearance with the ability to obtain and maintain a TS/SCI w. Polygraph prior to start

Nice To Haves

Current active DoD TS/SCI with Polygraph clearance
Experience with continuous integration/continuous deployment
Understanding of hardware and software testing methodologies
Awareness of hardware and software integration approaches at the low-level protocol and API-based levels
Experience with MBSE and requirements management tools, such as Cameo and DOORS
Familiarity with project & task management tools: Jira or Confluence
Familiarity with some subset of specialty engineering, modeling, and testing tools, such as: MATLAB, Python, Cypress, Cadence Assura, or Siemens Calebre

Responsibilities

Integrated Product Team (IPT) level role, member of Systems Engineering - Integration & Test (SEIT) Team, lead for System Integration Lab (SIL) Team
Lead the development of a hardware and software system integration lab for a segment of a complex multi-segment system that incorporates mature and emerging technologies.
Develop strategies for rapid and continuous integration of new products and emerging technologies within the segment.
Act as advocate - in partnership with system level SIL architect - for acceleration of capabilities that can enable early intra-segment and inter-segment partial integrations to de-risk major system development milestones and events.