AI is growing faster than any technology in history and the explosion in demand has created a massive infrastructure gap; we can no longer build chips or power stations fast enough to keep up. The industry is still leaning on a ten-year-old hardware blueprint that has reached its limit. A new paradigm that is faster and more efficient will be the biggest economic opportunity of the next century and create the most important company of the next decade. OLIX is building this next paradigm; the Optical Tensor Processing Unit (OTPU) achieves performance and energy efficiency that is impossible to match from existing architecture. We are seeking a highly experienced Staff FPGA Engineer to lead the architecture and implementation of FPGA-based prototyping and emulation systems in direct support of our OTPU ASIC development. This is a senior individual contributor role embedded within the ASIC design team, focused on owning the pre-silicon prototyping and emulation environments. You will translate evolving ASIC RTL into a high-fidelity multi-FPGA prototypes and emulation-accelerated environments - enabling early hardware–software co-development, functional validation, and system-level debug before tape-out. You will define how the ASIC is represented in FPGA, lead partitioning and mapping onto Cadence Protium or equivalent multi-FPGA prototyping platforms, and develop the infrastructure required to ensure the prototype is both accurate and usable. You will work closely with ASIC, hardware, software, and verification teams, as well as our FPGA engineering team in London, to ensure alignment across the broader FPGA programme. This role is not focused on production FPGA systems—the primary deliverable is a trusted, maintainable prototype platform that accelerates silicon and software development. Additional experience with commercial prototyping and emulation platforms is a plus!
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Job Type
Full-time
Career Level
Senior