Staff Foundry Interface Design Engineer- HBM - TPG

Micron Technology • Folsom, CA

1d • Hybrid

About The Position

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
For more than 43 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are redefining how the world uses information to enrich life!
In our hybrid role, you will be part of HBM Design Architecture team and provide technology support for the design & development of next-generation HBM DRAM products. You will join a highly multi-functional group of technical experts working closely with a distributed team from Engineering, Product, Process Development, Package Engineering, and Business Units. Together, you will ensure the success of our future HBM roadmap. You will interface between the internal design teams and external foundries (and internal Technology development teams) to understand and analyze technology/design bottlenecks and help design architects to propose innovative architectures to target best-in-class performance, power, cost, reliability, and quality for Micron’s HBM product portfolio.
Our team vision is a continuing desire to develop your skills working in an inclusive diverse environment of multicultural Teams across worldwide geographies! Enabling the creative career path you deserve with a collaborative environment, and groundbreaking technology while rapidly growing your abilities.
With HBM DEG or equivalent experience, we innovate and integrate complete front-end and backend processes. We develop, debug tests, and use qualification techniques to create the lowest power per bit solutions. This enhances customer experience in ML (Machine Learning) and AI (Artificial Intelligence). The success of a sophisticated product such as HBM relies vastly on vertical integration and the various engineering working in unison. To provide greater detail, our HBM technology pertains to stacking numbers of DRAM chips along with a logic chip within one package through an assembly technology called TSV (Through Silicon Via). This greatly increases the memory density in a package, while allowing very high-speed signal transmission. Furthermore, "high bandwidth"; is an outstanding memory design area where custom gate-level design and RTL style logic design are blended into the same product, and most of the DDR or LPDDR design is based on the gate-level design only. Lastly, verification and testing (validation) of HBM is the most ambitious due to the total size of the design and complexity of the functions, and in addition to craft, many innovations are needed for verification and validation of the HBM product, thereby making it uniquely engaging.

Requirements

• BSEE or greater with 4+ years of proven experience technically contributing in the relevant Design/Technology engineering roles.
• Experience working with Foundry Technology PDKs preferably advaned inFET nodes.
• Experience with EDA tools and design automation etc. with experience in CMOS circuit design. Familiarity with the fundamental concepts associated with parasitic extraction, physical verification, circuit simulation, and reliability verification.
• Understanding of compact device models and aging models is advantageous. Solid experience in automation using Python or equivalent scripting language is highly encouraged.
• Good understanding of Process Technology and device physics of advanced CMOS device architecture (FinFET and GAA).

Responsibilities

• Use foundry technology process design kits (PDKs) of advanced FinFET and GAA nodes to come up with design guidelines for power/performance optimization.
• Provide technical support for PDK-related issues to design teams.
• Collaborate with CAD teams, tool vendors, and foundries to ensure PDK compatibility and performance.
• Develop and maintain documentation for PDK usage and guidelines. Study and analyze Foundry Technology to provide guidelines to design team to improve power/performance/area and reliability.
• Participate in new architecture development for upcoming and future HBM base Die design through Design Technology Co-optimization involving std cells and BEOL options.
• Define Reliability specifications for DRAM and Base Die through multi-functional collaboration to meet the product needs.
• Yield and reliability analysis, process flow and integration development, product design, and testing optimization to accelerate advanced CMOS technology qualification and mass production ramp-up. Pathfinding to explore new architectures for future HBM products and make recommendations after performing a highly technical feasibility analysis!

Benefits

• Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.
• We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.
• Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.
• Additionally, Micron benefits include a robust paid time-off program and paid holidays.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees