Samsung Semiconductor-posted 2 months ago
$157,000 - $243,000/Yr
Full-time • Senior
San Jose, CA
5,001-10,000 employees

Samsung Semiconductor, Inc. is a world leader in Memory, System LSI and LCD technologies. We are currently looking for an exceptional senior FPGA engineer to join our team in San Jose, CA. The Memory Solutions Lab (MSL) is part of Samsung’s Memory Business Unit, the industry's technology and volume leader in DRAM, NAND Flash, SRAM memory. MSL’s vision is to solve key problems and optimize architecture solutions for Cloud & Data center environments. We are an integral part of Samsung’s strong R&D focus & lab innovation engine. We work closely with development teams to bring feature innovation to product roadmaps. The Candidate will be a key technical member of System Architecture Lab. He or she will join a team of experts in researching and developing innovative data center/ cloud networking, storage, and compute ASIC/ FPGA and system solutions. The ideal candidate must have prior experience developing leading edge networking, storage, and/or embedded computing solutions on FPGAs.

  • FPGA architecture, design, verification, lab bring-up, lab test and validation of an FPGA prototype for storage applications
  • Research next generation storage controller features in an FPGA environment
  • Develop new IP for high performance solid state drives
  • Research, evaluate and integrate acquired hardware Intellectual Property (IP)
  • Research emerging technology standards and map to optimal implementation in FPGA
  • Work with hardware/ software architects developing one-of-a-kind innovative FPGA prototypes and contribute to feasibility studies & developing solutions
  • Assist software architects developing Linux/ Windows device driver, test and debug
  • Propose and execute on innovations in software and hardware architecture based on their benefits to large-scale applications
  • B.S. with 10+ years, M.S. with 8+ years, or Ph.D. with 5+ years in Computer Engineering or Electrical Engineering
  • Demonstrated ability with FPGA design tool flows, synthesis, timing analysis, partitioning, FPGA programming, bring up and testing
  • In-depth background in HDL development, Verilog coding, integration, synthesis, debug, simulation, test bench creation and debug using CAD tools (Synopsys, Mentor, Cadence, or FPGA tools)
  • Hands-on lab prototype set up, testing, measurement and debug of storage solutions on FPGAs
  • Hands-on experience with hardware board bring-up, server system integration and software integration with FPGAs
  • Experience with evaluation and integration of 3rd party IP in an FPGA environment
  • Demonstrated expertise with FPGA design and synthesis tools, simulation tools, and scripting tools for test automation
  • Solid expertise in computer architecture, including experience with some of the following: server systems, data centers, processors, memory hierarchy, memory subsystems, storage, RAID, I/O and networking
  • Must be highly motivated with excellent verbal and written communication skills
  • Demonstrated attention to detail
  • Ability to meet aggressive project deadlines in a team environment
  • Ability to work successfully with cross-functional teams, including coordinating across organizational boundaries and geographies
  • Ability to create near term value within a strategic research environment
  • Comfortable working in a multinational environment and understands how to leverage cultural diversity
  • Past experience in FPGA design that uses high speed interfaces (DDR3/ DDR4, PCI-e G2/ G3 root port and end point, acquired digital IP, Ethernet, Gb PHY SERDES), System on chip, ARM CPU, networking, storage digital design, integration, board and system hardware bring up
  • 10/ 40/ 100 G Ethernet network interface design and debug
  • SATA/ SAS/ PCIe root port and end point interface design and debug
  • DDR3/ DDR4 memory controller and interface design and debug
  • AXI/ APB interconnect fabric design and debug
  • On-chip SRAM controller design and debug
  • Multi context DMA controller design and debug
  • Full chip integration and debug
  • Good understanding of TCP/ IP, UDP, VLAN, RDMA protocol
  • Good understanding of iSCSI/ SATA/ PCIe/ NVMe storage device design, development, debug and instrumentation
  • Good understanding of C/ C++ and excellent Perl/ Python scripting, Linux environment set up and debug
  • Good understanding of Linux OS internal operation, device drivers and protocol stacks
  • Prototype system data collection, pre and post processing scripts
  • Intel Server Linux set up, bring up, and FPGA emulation board integration, testing and debug (Ubuntu, Fedora, RH)
  • Advanced knowledge and development experience with PCIe/NVMe and DDR3/DDR4 interfaces
  • Advanced knowledge and development experience with RAID protocols and erasure coding
  • In depth understanding of low level software and device drivers such as Firmware, Boot, UEFI, PCIe, NVMe storage drivers, and similar device drivers
  • Understanding of typical hyperscale and data center applications and benchmarks
  • Exposure to Flash internal architecture, organization, ONFI/ Toggle protocol
  • You’re inclusive, adapting your style to the situation and diverse global norms of our people
  • An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding
  • You’re collaborative, building relationships, humbly offering support and openly welcoming approaches
  • Innovative and creative, you proactively explore new ideas and adapt quickly to change
  • Medical/Dental/Vision/401k
  • Charitable giving match and frequent opportunities to get involved
  • 4+ weeks of paid time off a year, plus holidays and sick leave
  • Stipend for fertility care or adoption, medical travel support, and an errand service
  • On-demand apps and paid therapy sessions
  • Onsite Café and gym, plus virtual classes
  • Flexible environment to find the right balance
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