Staff Engineer Analog PMIC Design

Qualcomm • Tempe, AZ

1d

About The Position

The role of a Staff Engineer, Analogue Design is to act as a key contributor to the design, implementation and verification of the complex
power-management blocks and subsystems of Qualcomm’s range of connectivity, Voice and Music chips. In addition to contributing to the
specification, design and verification of the blocks using appropriate tools, a Staff Engineer will contribute to the macro level architectures and
the definition of new features and market driven enhancements for Qualcomm’s chips.

Requirements

• 5+ year of work experience
• Design experience of Key Power management IPs like SMPS, LDOs
• Good understanding of the analog design.
• Ability to coordinate with different groups and define the requirements
• Experience in the design of various power-management blocks
• Bachelor's Degree in Electrical Engineering with 2+ years of experience with analog or mixed-signal integrated circuit design in nanometer planar CMOS or FinFET and 4+ years of ASIC design, verification, or related work experience.
• OR Master's degree in Electrical Engineering or related field and 4+ years of ASIC design, verification, or related work experience.
• OR PhD in Electrical Engineering or related field and 2+ of years ASIC design, verification, or related work experience.
• 2+ years of experience using one or more design tools (e.g., CADENCE, SPICE, MATLAB, and/or Verilog/VHDL).

Nice To Haves

• Fully competent in Analogue design and verification techniques
• Fully competent in the use of Cadence and Mentor analogue design and verification tools
• Knowledge of Matlab and other system design tools for defining the architecture and specification of the blocks is a plus.
• Good team player.
• Good interpersonal and communication skills

Responsibilities

• Acts as a key contributor in a complex environment;
• Definition of the architecture for the complex Power-management blocks, plan and execute the development of the blocks and providing the necessary documentation to different departments for the characterization of the block.
• Responsible for the delivering the fully verified blocks and may get involved in the verification of power-management subsystems within the Analogue section of a chip;
• Solves complex problems in a tightly constrained environment;
• Fully competent in Analogue design for complex sub-cells and small subsystems;
• Keeps abreast of new developments and is technical expert in the design of analogue sub-cells;
• Ensures quality of the solution; works with macro lead to ensure timely delivery of subsystems

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees