Staff CPU Verification Engineer

Qualcomm • Santa Clara, CA

4d

About The Position

This individual leads, plans, synthesizes ambiguous or conflicting requirements and performs the complex responsibility of performing block level verification for complex, multi-feature designs using the most advanced verification techniques (sim, formal, emulation). Review and refine testplan contents with help from design team and verification leadership. Construct emulation capable testbench and components for use on emulation and prototyping platforms. Debug complex systems and designs during the verification process. Investigate test and assertion failures and provide initial triage and debug. Work with design and microarchitecture to resolve all open issues and identify design faults. Build monitors, checkers, and assertions to aid in debug process. Follow coding and construction guidelines for all monitor components to enable cross-platform use. Build stimulus generation mechanisms that are reusable across platforms. Complete all testplan items necessary to achieve full test coverage. Support and maintain random stimulus generation capabilities to consistently reach expected coverage targets. Work with design and microarchitecture teams to understand coverage holes, and to craft stimulus required to cover those holes. Build functional coverage model to accurately measure transactional and architectural features of the design. Support unit level testcases to be ported to a full chip and bring-up environment. Build and support common testbench components useful for various design testbenches. Develop scripts and automation in Python, Perl, etc. to increase time savings in verification process. Act as a strong contributor at design reviews and project meetings and communicate and implement a development plan.
Will accept a Master's Degree (or foreign academic equivalent) in Electrical Engineering, Computer Engineering, Computer Science or related degree field and three (3) years of experience in a related occupation.

Requirements

• Master's Degree (or foreign academic equivalent) in Electrical Engineering, Computer Engineering, Computer Science or related degree field
• three (3) years of experience in a related occupation

Responsibilities

• Lead and plan block level verification for complex, multi-feature designs.
• Review and refine testplan contents.
• Construct emulation capable testbench and components.
• Debug complex systems and designs during verification.
• Investigate test and assertion failures and provide initial triage and debug.
• Work with design and microarchitecture to resolve open issues and identify design faults.
• Build monitors, checkers, and assertions to aid in debug process.
• Follow coding and construction guidelines for monitor components to enable cross-platform use.
• Build stimulus generation mechanisms that are reusable across platforms.
• Complete all testplan items necessary to achieve full test coverage.
• Support and maintain random stimulus generation capabilities.
• Work with design and microarchitecture teams to understand coverage holes and craft stimulus.
• Build functional coverage model.
• Support unit level testcases to be ported to a full chip and bring-up environment.
• Build and support common testbench components.
• Develop scripts and automation in Python, Perl, etc.
• Act as a strong contributor at design reviews and project meetings and communicate and implement a development plan.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees