Staff ASIC Verification Engineer
About The Position
MaxLinear is seeking a Staff ASIC Verification Engineer to join our team. In this role, you will focus on the following: Define SoC verification strategies, test plans, and execution plan with ASIC Verification team Own IP level ASIC verification efforts toward SOC T/O Implement best industry practices for SoC verification; improve and harmonize verification methodologies across the organization to maximize efficiency and predictability of outcome Deliver test bench architecture, functional models, complete test environments, and test suites meeting coverage targets to ensure first-time silicon success Collaborate with design team and project stakeholders on testability improvements and on debug process during test bench bring up
Requirements
- Track record in verification strategy development and execution for large SoCs and signoff with coverage metrics
- Hands-on knowledge of UVM methodology, System Verilog, C/C++
- Implementation of directed and constrained random test benches for communication physical layer, Ethernet networking, packet processing, PCIE and multi-CPU environments
- Knowledge of verification IP and functional coverage techniques
- Experience with gate level simulations of delay annotated netlists
- Exposure to FPGA emulation and lab validation
- Self-motivated, excellent communication skills, and ability to excel and to provide leadership in a fast-paced environment
- BS in Electrical Engineering or related + 5 years of experience, or MS + 3 years of experience, or Ph.D.
Responsibilities
- Define SoC verification strategies, test plans, and execution plan with ASIC Verification team
- Own IP level ASIC verification efforts toward SOC T/O
- Implement best industry practices for SoC verification; improve and harmonize verification methodologies across the organization to maximize efficiency and predictability of outcome
- Deliver test bench architecture, functional models, complete test environments, and test suites meeting coverage targets to ensure first-time silicon success
- Collaborate with design team and project stakeholders on testability improvements and on debug process during test bench bring up
Benefits
- health care benefits
- 401k savings plan
- Employee Stock Purchase Plan (ESPP)
- paid time off
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
Number of Employees
1,001-5,000 employees
