Staff ASIC Design Verification Engineer, Platforms and Devices

Google • Mountain View, CA

84d • $183,000 - $271,000

About The Position

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a tech lead in the Google Silicon Platforms team, you will work on the verification of Google's SOC offerings. You collaborate with hardware architects and design engineers for functional, power and performance verification of the infrastructure Intellectual Properties (IPs), interconnects, caches, memory management and system services. You will work on solving multi-dimensional problems that may be ambiguous and lacking clear precedent. You also work on developing VIPs for protocols supported by our SOCs, and closely collaborate in the deployment of the verification stack across a heterogeneous set of IPs. Our approach to building systems is based on scalability. Your work will include building and verifying a generalized system topology abstractions, and developing the associated methodologies and tools needed to solve the problem. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Requirements

• Experience in ASIC design verification.
• Strong understanding of SOC architecture and design.
• Proficiency in developing verification environments and testbenches.
• Experience with hardware description languages (HDLs) such as Verilog or VHDL.
• Familiarity with verification methodologies such as UVM or SystemVerilog.

Nice To Haves

• Experience with power and performance verification.
• Knowledge of memory management and system services.
• Familiarity with AI and machine learning technologies.
• Experience in a tech lead role.

Responsibilities

• Work on the verification of Google's SOC offerings.
• Collaborate with hardware architects and design engineers for functional, power and performance verification of infrastructure IPs, interconnects, caches, memory management, and system services.
• Solve multi-dimensional problems that may be ambiguous and lacking clear precedent.
• Develop VIPs for protocols supported by SOCs.
• Collaborate in the deployment of the verification stack across a heterogeneous set of IPs.
• Build and verify generalized system topology abstractions.
• Develop methodologies and tools needed to solve verification problems.

Benefits

• Bonus
• Equity
• Health benefits
• Retirement plans
• Paid time off

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Industry: Web Search Portals, Libraries, Archives, and Other Information Services
• Education Level: Bachelor's degree