Staff Analog Design Engineer

Jobgether

2d • $100,000 - $500,000 • Remote

About The Position

This role offers the opportunity to drive the development of advanced analog and mixed-signal IP for high-performance chiplet PHY designs. You will lead full lifecycle projects, from design and verification to tape-out and silicon bring-up, ensuring production-quality results in cutting-edge FinFET technologies. The position is highly collaborative, interfacing with architecture, digital, verification, layout, and software teams to optimize analog and mixed-signal blocks for complex SoCs. Your work will directly impact the performance, power efficiency, and scalability of next-generation high-speed communication and AI-focused hardware. This is a remote-friendly position that values innovation, ownership, and technical excellence across all stages of analog design.

Requirements

• BSEE, MSEE, or PhD with 10+ years of relevant analog/mixed-signal IC design experience, including PLL and AMS design in FinFET processes.
• Proven experience with production tape-outs and silicon bring-up.
• Proficiency with industry-standard EDA tools and a strong understanding of layout-driven design constraints.
• Experience in high-speed datacomm/SerDes and die-to-die PHY design, including high-speed digital blocks and Tx/Rx equalization techniques (CTLE, DFE, de-emphasis).
• Strong analytical and documentation skills, with the ability to communicate complex technical concepts clearly.
• Hands-on experience with circuits such as bias generators, amplifiers, LDOs, switched-cap circuits, oscillators, ADCs, DACs, and DDR/PCIe/USB PHY components.
• Self-motivated, energetic, and collaborative mindset to work effectively across multiple teams.

Responsibilities

• Designing and developing die-to-die chiplet PHY IP, including PLLs, amplifiers, LDOs, switched-cap circuits, ADCs/DACs, and other critical analog/mixed-signal components.
• Leading the full design lifecycle: architecture, schematic design, verification, layout interaction, tape-out, and silicon bring-up.
• Collaborating with cross-functional teams in architecture, digital, verification, layout, and software to optimize performance, power, and area.
• Driving production-quality outcomes for circuits in deep sub-micron FinFET technologies.
• Contributing to scalable and reusable AMS IP methodologies and high-speed I/O/PHY architectures.
• Documenting results, analyzing design trade-offs, and presenting technical findings clearly to stakeholders.

Benefits

• Competitive total compensation package ranging from $100k–$500k (base + variable), depending on experience and location
• Comprehensive healthcare, dental, and vision coverage
• Remote-friendly work environment with flexible hours
• Generous paid time off and holiday schedule
• Professional development and mentorship opportunities
• Participation in challenging, high-impact engineering projects with cutting-edge technologies

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Education Level: Ph.D. or professional degree