SRAM Design Engineer – Custom Circuit Design

Advanced Micro Devices, Inc•Boxborough, MA

23d•Hybrid

About The Position

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE AMD’s Cores Organization develops industry‑leading CPUs and cache architectures that power our server, client, and gaming products. We are seeking an experienced VLSI physical design engineer to join our team as a technical expert and key contributor to AMD’s next‑generation core and cache designs. This position is associated with our Fort Collins, CO site, and flexible work arrangements (such as hybrid options) may be considered based on business needs. THE PERSON We welcome candidates who have strong analytical and problem‑solving skills, along with the ability to work both independently and collaboratively. This role involves long‑term, complex projects, so adaptability, initiative, and effective organization are highly valued. We encourage innovative thinking and a continuous‑improvement mindset. Clear communication—both written and verbal—is important for collaborating with colleagues across multiple sites and disciplines. We value diverse working and communication styles and believe they strengthen our team and outcomes.

Requirements

A BS/MS in Electrical Engineering, Computer Engineering, Computer Science (or a related field), or equivalent practical experience is required.

Nice To Haves

Hands‑on experience with high‑speed SRAM design.
Strong understanding of computer architecture, hardware design concepts, and system‑level tradeoffs.
Knowledge of chip‑level floor planning, bus/pin planning, clock tree synthesis, placement, optimization, routing, parasitic extraction, static timing analysis, IR‑drop analysis, electromigration, physical verification, and sign‑off processes.
Ability to comprehend and make minor modifications to Verilog RTL for timing or power improvements.
Knowledge of digital circuits, high‑speed flops, synchronizers, level shifters, and SRAM architectures.
Familiarity with programming and scripting languages such as Perl, C, and TCL

Responsibilities

Serve as a technical lead for high‑speed SRAM design in deep‑submicron FinFET technologies.
Collaborate with RTL and physical design teams across multiple locations to optimize power, performance, area, and schedule.
Identify opportunities for improvement and contribute creative, effective solutions to design and tool challenges.
Prepare and deliver technical presentations for peers and leadership.
Provide guidance and support to less‑experienced engineers in a collaborative and respectful environment.