Sr Staff Digital Design Engineer

Empower Semiconductor • Milpitas, CA

2h

About The Position

Break free from legacy packaging constraints and push the limits of power delivery. At Empower Semiconductor, we are redefining how power is delivered to the world’s most demanding AI processors through ultra-high-frequency, ultra-high-density power converters built on advanced semiconductor technologies. Based in Silicon Valley, Empower is a power management technology leader at the forefront of the AI, HPC and data-center applications. Learn more at www.empowersemi.com and follow us on LinkedIn. Role Overview Our power management ICs and next-gen products are driven by complex digital controllers. We are seeking an experienced Senior/Principal Digital Design Engineer capable to lead digital RTL development of control logic for cutting-end PMICs and analog/mixed-signal ICs in FinFast™ technology. You’ll define the digital architecture of our products, including embedded cores, NVMs/memories, proprietary and/or standard multi-bus systems, interfaces, multi-domain clock-trees. You will work closely with our analog, layout, firmware and verification international teams to develop ultra-compact, ultra-efficient digital controllers and contribute to top-level chip architecture. Job Summary: Our power management ICs and next-gen products are driven by complex digital controllers. We are seeking a talented and motivated experienced Digital IC Designer to join our innovative team. The ideal candidate will be responsible for designing, developing, and verifying digital integrated circuits for PMIC application. This role requires strong technical skills, creativity, and the ability to work collaboratively in a fast-paced environment.

Requirements

• Advanced degree in Electrical Engineering or a related field.
• 10+ years of experience in digital IC design
• Familiarity with digital design tools and environments (e.g., Cadence, Synopsys).
• Basic understanding of analog and full custom circuit design
• Proficiency in Verilog and standard digital design methodologies, like logic synthesis, timing constraints, STA, back annotation of parasitic, gate level simulation, equivalence checking
• Experience in RTL development related to bus protocols, synchronization, state machines, memory/processor interfaces, and asynchronous state machine
• Strong analytical and problem-solving skills.
• Excellent communication and teamwork abilities.

Nice To Haves

• Automatic ECO flow experience is a plus

Responsibilities

• Own and drive design IP development with high quality and reusability
• Perform standard digital flow checks: clock domain crossing, LINT, LEC, synthesis/scan-insertion/timing closure and Place & Route as needed
• Work closely with cross-functional teams, including analog designers, verification engineers, and definers, to ensure clear definition and seamless integration of designs.
• Communicate design progress and technical challenges through status report/detailed design review.
• Work with AMS/DV teams to integrate digital RTL and gate-level netlists in mixed-signal/DV simulation environments.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: No Education Listed
• Number of Employees: 51-100 employees