The Hardware Infrastructure team in Groq is responsible for architecting and supporting a world class ASIC development and verification environment that optimizes the productivity of our hardware engineering team.
Architect, develop, and deploy an innovative framework that enables automation of the Groq silicon design flow.
Collaborate with the silicon design team to migrate the Groq hardware code base into a form that facilitates dynamic scaling and feature management.
Engage with software teams to define and deliver configuration-specific collateral that streamlines co-development.
Investigate new and novel ways to accelerate verification and physical design of the generated designs, leveraging AI/ML approaches where possible.
Investigate opportunities to more closely align hardware, software and production flows.
Bachelor's or Master's degree in Computer or Electrical Engineering
A solid background in ASIC/FPGA hardware (5+ years in design, verification, or EDA/CAD experience).