Sr. RTL Design Engineer - QGOV

Qualcomm-posted 2 months ago
$115,600 - $173,400/Yr
Full-time • Mid Level
Remote • San Diego, CA
5,001-10,000 employees
Computer and Electronic Product Manufacturing
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As a Design Engineer, you'll play a critical role in shaping cutting-edge digital designs. Your responsibilities will include designing micro-architecture for both simple and complex digital, interface blocks, developing RTL (Register Transfer Level) code using industry best practices, troubleshooting and debugging issues during the development process, creating comprehensive design documentation, optimizing designs for key metrics such as area, power, and performance, and collaborating with cross-functional teams, including DFT (Design for Testability), Implementation, Verification, Emulation, and Firmware teams. This position requires full-time presence in San Diego, 5 days a week.

  • Designing micro-architecture for both simple and complex digital, interface blocks.
  • Developing RTL (Register Transfer Level) code using industry best practices.
  • Troubleshooting and debugging issues during the development process.
  • Supporting post-silicon bring-up activities.
  • Creating comprehensive design documentation.
  • Optimizing designs for key metrics such as area, power, and performance.
  • Collaborating with cross-functional teams, including DFT, Implementation, Verification, Emulation, and Firmware teams.
  • 5+ years of work experience with RTL/FPGA design (Verilog, System Verilog), embedded system architecture and Verification.
  • Bachelor's degree in computer science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.
  • OR Master's degree in computer science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.
  • OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
  • Positive Attitude: Bring a fun-loving attitude and a passion for inclusively solving problems.
  • 5+ years of ASIC design experience.
  • System Verilog Design, Linting, CDC, Synthesis (FPGA and ASIC) expertise.
  • Building the test suites for design validation.
  • Understanding of Emulation and prototyping flows for the design and validation in Lab.
  • Experience with designing complex digital logic blocks and sub systems (CPU, GPU, DSP, Always on Systems, Digital interfaces).
  • Knowledge of ISAs (Instruction Set Architectures) such as ARM THUMB or RISC-V.
  • Understanding of processor or microcontroller system design.
  • Experience with designs spanning multiple power domains and clock domains.
  • Proficiency in scripting or automation languages like Python or Perl.
  • Familiarity with state-of-the-art industry-standard digital design tools.
  • Awareness of challenges faced when working with lower node technologies.
  • Competitive annual discretionary bonus program.
  • Opportunity for annual RSU grants.
  • Comprehensive benefits package designed to support success at work, at home, and at play.
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