Sr. Product Engineer

OmnivisionSanta Clara, CA
5d

About The Position

Design a characterization/testing plan and work with R D teams and manufacturing engineers to resolve various technical issues to meet performance requirements; participate in product definition and provide DFM inputs; work in close collaboration with silicon foundry, imager characterization and pixel design; interact with foundry fab in improving all silicon process, color, and package issues; improve product yield and performance by process optimization and layout design update; analyze yield and drive corrective actions for yield improvements; drive characterization to finalize the product datasheet; work with pixel design group to design the most sophisticated and optimized pixel layout; work with characterization team to analyze and debug pixel device circuit and various image related issues; ramp up for image sensors and ASIC devices; coordinate with company's fab to drive semiconductor processing tool vendors to optimize processes, including raw material vendor, IMP tool vendor and photo resist vendor etc.; set up new tape out product process flows, inline handbooks, JDV check etc.; work with testing engineers to develop, verify and release testing program at CP or FT.Program coding, such as python, to improve work efficiency in data analysis.

Requirements

  • Master's degree or foreign equivalent degree in Materials Science & Engineering, Physics, or related fields.
  • Two years of experience in process integration.
  • Analyze the correlation among Yield/Defect/Inline/Reliability and reduce lost.
  • Assess CMOS Imaging Process to maximize the production capacity in Fab.
  • Construct multiple work systems with IT to reduce workload.
  • Release CMOS Imaging Process proposals to deduct the expense of material and improve the yield of wafer edge.
  • Conduct a course to enhance colleagues' vigilance against product defect disasters.
  • Implement customers' IP design into new node and perform trial run in Fab.
  • Forecast yield precisely and estimate the target in next season.
  • Plan the process/testing priority of the product to trace issues during the mass production.
  • Ensure the quality of the wafers by the strict management from wafer-start to fab-out.

Responsibilities

  • Design a characterization/testing plan
  • Work with R D teams and manufacturing engineers to resolve various technical issues to meet performance requirements
  • Participate in product definition and provide DFM inputs
  • Work in close collaboration with silicon foundry, imager characterization and pixel design
  • Interact with foundry fab in improving all silicon process, color, and package issues
  • Improve product yield and performance by process optimization and layout design update
  • Analyze yield and drive corrective actions for yield improvements
  • Drive characterization to finalize the product datasheet
  • Work with pixel design group to design the most sophisticated and optimized pixel layout
  • Work with characterization team to analyze and debug pixel device circuit and various image related issues
  • Ramp up for image sensors and ASIC devices
  • Coordinate with company's fab to drive semiconductor processing tool vendors to optimize processes, including raw material vendor, IMP tool vendor and photo resist vendor etc.
  • Set up new tape out product process flows, inline handbooks, JDV check etc.
  • Work with testing engineers to develop, verify and release testing program at CP or FT
  • Program coding, such as python, to improve work efficiency in data analysis
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