Sr Principal Engineer, NPI

Sitime Corporation•Santa Clara, CA

About The Position

About SiTime SiTime Corporation is a precision timing company. Our semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance, smaller size, lower power, and better reliability. With more than 3 billion devices shipped, SiTime is changing the timing industry. For more information, visit www.sitime.com . Job Summary The NPI Engineer will lead transitioning new product to manufacturing; he will collaborate with cross functional team to develop a high-volume manufacturing/testing process for new SiTime product. The NPI engineer will lead Qual (reliability) execution and early customer sampling as well as low volume (LVM) manufacturing. He works cross functionally to bring up OSAT, and make sure smooth transition to Operation.

Requirements

Minimum master’s degree in electrical engineering
Familiar with high volume manufacturing and high-volume data processing.
Expertise in running Qual (reliability) of semiconductor industry
Knowledge of MEMS and semiconductor manufacturing and packaging
Familiar with ATE testing, capacity calculation and planning
Minimum 5 years’ experience in operations or development in semiconductor industry.

Nice To Haves

Excellent written and verbal communication skills required
Demonstrate ability to partner and communicate effectively with vendors and cross functional team
Strong ownership of responsibilities
Ability to work well with others in a fast-paced, dynamically changing, collaborative team environment
Knowledge of Oracle ERP system is a plus

Responsibilities

Work with quality team to develop Qual plan, and make sure resources are ready
Responsible for execution of the qual plan in tight schedule while guarantee quality
Collaborate cross functionally to document all manufacturing and test procedures
Work with OPS team to bring up OSAT, document all procedures, and confirm capacity
Work with PE and TE team to develop final test processes that are executable in high volume
Work with MEMS, CMOS, PE and SE team to develop template for limit development
Work with Packaging, PE, and IE to develop template for RTP documentation requirements