Sr. Physical Verification Engineer

BroadcomSan Jose, CA
17h

About The Position

As a member of the ASIC implementation team, you will be involved in Sign-off flows including physical verification, ESD checking, and package RDL routing.

Requirements

  • Bachelors and 12+ years of related experience or Masters degree and 10+ years of related experience
  • Strong background in full-chip physical verification (LVS/DRC/ANT/ERC)
  • Strong scripting knowledge (perl, tcl and/or csh)
  • Able to understand and debug rule decks
  • Able to do block-level place & route
  • Full-chip implementation is desirable
  • Tool knowledge preferable: Calibre, Redhawk & Totem, Cadence Virtuoso, Cadence Innovus, Synopsys ICC2

Benefits

  • Medical, dental and vision plans
  • 401(K) participation including company matching
  • Employee Stock Purchase Program (ESPP)
  • Employee Assistance Program (EAP)
  • company paid holidays
  • paid sick leave and vacation time

Stand Out From the Crowd

Upload your resume and get instant feedback on how well it matches this job.

Upload and Match Resume

What This Job Offers

Job Type

Full-time

Career Level

Mid Level

Number of Employees

5,001-10,000 employees

© 2024 Teal Labs, Inc
Privacy PolicyTerms of Service