SR PERIPHERAL SUBSYSTEM DESIGN ENGINEER
Esperanto Technologies•Portland, OR
312d•$100,000 - $300,000
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About The Position
We are looking for a candidate to join our next generation Systems on a Chip (SOC) RTL design team. The candidate will be a part of the I/O design team responsible for specifying, implementing and integrating Verilog RTL IPs into our custom high performance, energy efficient AI processor.
