Sr. Layout Engineer HBM

Micron • Richardson, TX

2d

About The Position

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Senior Layout Engineer at Micron Technology, you will play a critical role in the physical implementation of advanced High‑Bandwidth Memory (HBM) designs. You will be responsible for block‑level and top‑level layout development across modern technology nodes, enabling 2.5D and 3D integration solutions. This role partners closely with design, packaging, signal‑integrity, and physical build teams to deliver robust, manufacturable layouts that meet performance, reliability, and foundry requirements.

Requirements

• Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, or a related field
• 5+ years of experience in IC physical layout for advanced semiconductor technologies
• Hands‑on experience with DRC/LVS/PEX signoff flows and foundry rule decks
• Strong understanding of advanced-node layout constraints and reliability considerations
• Ability to work effectively across multi-functional teams with minimal supervision

Nice To Haves

• Experience supporting HBM, 2.5D, or 3D‑IC designs, including TSV‑based integration
• Familiarity with electro-migration and IR‑drop analysis in high‑performance memory designs
• Experience collaborating with packaging and signal‑integrity teams on complex integrations

Responsibilities

• Perform block‑level and top‑level physical layout for High‑Bandwidth Memory (HBM) components across advanced process nodes
• Implement layouts supporting 2.5D and 3D integration, including TSVs, micro‑bump arrays, keep‑out zones, die‑to‑die interfaces, and alignment constraints
• Apply and interpret HBM‑specific design rules and foundry build requirements to ensure manufacturability and reliability
• Run, debug, and close DRC, LVS, ERC, density, and signoff checks to achieve clean tape‑out
• Support parasitic extraction, electromigration (EM), voltage‑drop (IR) analysis, and reliability verification; implement required layout updates
• Collaborate with analog and mixed‑signal designers to optimize floorplans and resolve layout‑related performance tradeoffs
• Partner with physical build, packaging, and signal‑integrity teams on top‑level integration, pin assignment, and power distribution strategies
• Ensure layout compliance with process constraints, reliability guidelines, and Micron internal standards

Benefits

• Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.
• We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.
• Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.
• Additionally, Micron benefits include a robust paid time-off program and paid holidays.
• For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits .

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees