Sr. FPGA Verification Engineer - Austin, TX

Trend MicroAustin, TX
16dHybrid

About The Position

Trend Micro, a global cybersecurity leader, helps make the world safe for exchanging digital information across enterprises, governments, and consumers. Fueled by decades of security expertise, global threat research, and continuous innovation, Trend harnesses AI to protect organizations and individuals across clouds, networks, devices, and endpoints. The Trend Vision One™ enterprise cybersecurity platform accelerates proactive security outcomes by predicting and preventing threats across the entire digital estate and environments like AWS, Google, Microsoft, and NVIDIA. Proactive security starts here. TrendMicro.com Location: This is a hybrid role based out of our Austin, TX office and requires in-office presence three days a week. Position Summary: We are looking for an exceptional Sr. FPGA Verification Engineer to join our world class FPGA development team in Austin, Texas. For more than 20 years, Trend Micro has been developing advanced multi million gate FPGAs that drive ultra high performance network packet processing and security acceleration. Our team delivers cutting edge hardware solutions for encryption/decryption, pattern matching, deep data extraction/analysis, and high speed system interfaces. If you are passionate about architecting scalable UVM environments, mastering SystemVerilog OOP, and driving verification excellence on FPGA designs—this role offers the challenge and impact you’re looking for. As a Sr. FPGA Verification Engineer, you will own the development of advanced verification Testbench. You will design from the ground up, build reusable UVM verification components, create simulation cases and guide junior engineers in best in class methodologies.

Requirements

  • BS or higher degree in Electrical Engineering (BSEE) or Electrical and Computer Engineering (BSECE) or Computer Science (BSCS).
  • 7+ years of FPGA or ASIC design verification experience using UVM.
  • Deep expertise in SystemVerilog, OOP principles, and UVM methodology.
  • Proven ability to develop UVM testbenches from scratch and drive verification architecture decisions.
  • Exceptional analytical, problem solving, communication, and leadership skills.
  • Ability to collaborate and work in a team environment.
  • Hands-on experience with simulation/debug tools i.e., VCS, Verdi, etc.
  • Scripting experience (e.g., Python) for verification flow automation and productivity improvements.

Nice To Haves

  • Familiarity with AXI4, AXI4 Stream, PCIe, or other high speed protocols is desirable.
  • Experience integrating vendor provided VIPs in UVM environments is a plus.
  • Understanding of networking protocols such as Ethernet, IP, TCP/UDP is a plus.
  • Familiarity with major simulation and tool vendors is a plus.
  • Experience with an AI-DLC workflow is a plus
  • Experience with verification of AI engine IPs is a plus

Responsibilities

  • Develop UVM Testbenches for complex, high performance FPGA designs.
  • Expert-level SystemVerilog OOP skills to create modular, scalable, and reusable verification environments.
  • Leverage AI tools to accelerate high quality UVM and SystemVerilog testbench development.
  • Strong skills in debug, failure re-creation and root cause analysis.
  • Ownership of testbench development, including stimulus, driver, monitors, response checkers, assertions and coverage.
  • Develop direct and constrained-random stimulus.
  • Analyze functional and code coverage results to drive verification closure.
  • Improving and refining the verification process, methodology, and metrics
  • Collaborating closely with RTL designers to define, create and maintain the verification test plan.

Benefits

  • Comprehensive medical, dental and vision insurance
  • Life insurance
  • Short & Long Term Disability
  • Pre-partum, maternity, parental and medical leave
  • Mental Health Wellness Program
  • Adoption Assistance
  • Wellness Incentive
  • Pet Insurance
  • 401(k) with company match
  • Paid Time Off
  • 14 Annual Holidays
  • Tuition Assistance
  • Employee Resource Groups
  • We offer competitive compensation with bonus opportunity tied to company performance, along with room to enhance your skills through ongoing learning and broad technological opportunities.
  • Achieving work-life balance is a priority, complemented by team activities, fostering an environment rooted in equity, inclusion, and collaboration, that is reflected in both our culture and our work.
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