Sr. FPGA Engineer

Xona Space Systems-posted 3 months ago

Full-time • Mid Level

Burlingame, CA

51-100 employees

Publishing Industries

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Xona is the navigational intelligence company bringing real-time, centimeter-level certainty to any device, anywhere on Earth. With Pulsar - the world's most advanced PNT satellite infrastructure in Low Earth Orbit - Xona will offer a future-proof, backwards-compatible global positioning system optimized for absolute precision, superior power, and robust protection. We're seeking a hands-on Sr. FPGA Engineer to join our team and help design the next generation of space-based navigation payloads. You'll work on cutting-edge signal processing systems, secure hardware modules, and high-reliability designs that fly in orbit. If you thrive in a collaborative, fast-paced environment and are excited by the challenge of developing space-qualified digital systems, we want to hear from you.

Architect and implement RTL for Xilinx RFSoC and other space-qualified FPGAs.
Design high-performance DSP and signal generation modules for navigation waveforms (e.g., PRN code generation, mixers, modulators).
Develop secure hardware blocks (e.g., SHA-256, HMAC) for authentication and anti-spoofing.
Build robust data pipelines to move and process signal streams in real-time.
Design with space in mind: mitigate single event upsets (SEUs), implement fault detection/correction, and optimize for radiation-prone environments.
Work closely with cross functional teams to bring up payload functionality on actual satellite hardware.
Simulate, verify, and test your designs rigorously - then see them fly.

Bachelor's or Master's degree in Electrical or Computer Engineering (or similar).
3+ years of FPGA development experience using Verilog, VHDL, or SystemVerilog.
Experience with HDL simulation and verification.
Proven experience with AMD/Xilinx platforms-ideally RFSoC or Zynq Ultrascale+ - and their embedded PL+PS architectures.
Solid background in DSP fundamentals and real-time signal processing in hardware.
Strong grasp of on-chip dataflow, clock domain crossing, and AXI/AXI-Stream buses.
Comfortable using Vivado, Riviera Pro, and Synplify.
Proven track record of developing in a collaborative environment, including familiarity with git/gitlab and strong documentation discipline.

Experience designing for space: SEU mitigation, TMR, scrubbing, or rad-hard flows.
GNSS or navigation signal processing expertise (GPS, Galileo, etc.).
Crypto hardware design (e.g., SHA-2, HMAC, AES) and experience with secure communication protocols.
Familiarity with JESD204B/C, high-speed serial I/O, or RF front-end interfacing.
Embedded software experience on ARM (e.g., for control/config of FPGA fabric).
Python or TCL scripting for test automation and build flows.
Knowledge of space qualification processes, radiation testing, or flight hardware integration, with preference for strong hardware-in-the-loop devops practices.
C/C++ programming experience.
Experience with digital generation of high performance RF signals.

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