Sr Formal Verification Engineer (Remote)

Encore Semi-posted 10 days ago
$140,000 - $160,000/Yr
Full-time • Mid Level
Remote • Irvine, CA
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We are seeking a Formal Verification Engineer to join our SoC/ASIC design team. The ideal candidate will have deep expertise in formal property verification , clock domain crossing (CDC) analysis , and static design checks using industry-standard tools such as SpyGlass , JasperGold , and related EDA technologies. You will work closely with RTL design, functional verification, and physical design teams to ensure design correctness, quality, and robustness before tape-out.

  • Develop and execute formal verification strategies and test plans for complex digital designs.
  • Use Cadence JasperGold or equivalent tools to verify design properties, perform bounded proofs, and identify corner-case design bugs.
  • Perform CDC and RDC (Reset Domain Crossing) analysis using Synopsys SpyGlass or similar tools.
  • Drive linting, reset analysis, X-propagation , and power intent verification using static tools.
  • Collaborate with RTL designers to define assertions, constraints, and coverage goals.
  • Debug formal verification results, root-cause issues, and recommend RTL fixes.
  • Maintain and improve the verification environment, methodologies, and documentation.
  • Participate in code reviews and contribute to best practices for design quality and verification sign-off.
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
  • 5 - 8 years of experience in ASIC/SoC design or verification with a focus on formal verification .
  • Hands-on experience with: Cadence JasperGold (Formal Verification) Synopsys SpyGlass (CDC, Lint, RDC, DFT, Low Power)
  • Strong understanding of digital design principles , RTL coding (SystemVerilog/VHDL) , and verification methodologies .
  • Solid knowledge of clock/reset domain crossings , metastability, and data synchronization techniques.
  • Familiarity with assertion-based verification (SVA/PSL) .
  • Excellent debugging and problem-solving skills.
  • Strong communication and collaboration abilities across multi-disciplinary teams.
  • Experience with low-power verification (UPF/CPF) .
  • Familiarity with equivalence checking and static timing analysis concepts.
  • Exposure to functional verification (UVM) or simulation environments .
  • Prior work in safety-critical or high-reliability systems (e.g., automotive, aerospace).
  • 15 days of PTO per calendar year
  • 10 paid Holidays per calendar year
  • Comprehensive Medical Benefits: Company covers 80% of premiums for Employee and Dependents
  • Dental & Vision: Company covers 50% of premiums for Employee and Dependents
  • Voluntary Benefits: Life Insurance, FSA (Health and Dependent, Limited Purpose), HAS, and Gap Insurance
  • Employee Assistant Program (EAP)
  • 401k - Traditional & Roth
  • Life/AD&D and Long-Term Disability
  • Tuition reimbursement
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