Sr Engineer AI Infrastructure Validation

Advanced Micro Devices, Inc•Austin, TX

About The Position

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. As a Sr Engineer AI Infrastructure Validation, you will architect, validate, and debug large‑scale AMD GPU systems spanning device, node, chassis, and rack-level deployments. You will define system-level test strategies for multi-GPU, multi-node accelerator platforms, ensuring correctness, performance, scalability, and reliability across hardware and software boundaries. This role is deeply technical and hands-on, involving GPU bring-up, firmware/driver interaction, networking validation (RDMA), and large-scale cluster enablement. You will directly influence product readiness and future AMD GPU platform designs by providing system-level feedback into architecture, silicon features, and validation infrastructure. THE PERSON: You are a system thinker with deep technical instincts, capable of root-causing failures that span GPU silicon, PCIe/Infinity Fabric, networking, drivers, firmware, and orchestration layers. You are comfortable debugging issues that only emerge at scale—during long‑running workloads, high-throughput fabric stress, or multi-node synchronization scenarios. You bring: Proven technical leadership in complex GPU/accelerator environments The ability to translate low-level failures (timeouts, hangs, data corruption) into actionable root causes Strong collaboration skills across Architecture, Design, Firmware, Software, and Validation teams A track record of building robust, repeatable test infrastructure, not one-off debug scripts

Requirements

Extensive experience in system-level development and validation for GPU or accelerator-based platforms in data center or HPC environments
Strong understanding of: GPU architectures and software stacks (drivers, runtime, firmware interaction) GPU memory hierarchies, data movement, and synchronization Scale-up and scale-out fabrics and their performance/debug implications
Hands-on experience with application scaling on GPU or accelerator clusters, including: Debugging scaling inefficiencies Identifying bottlenecks across compute, memory, and network fabrics
Deep knowledge of networking and RDMA-enabled accelerator solutions, including: Fabric bring-up and validation Latency, bandwidth, and congestion analysis Debugging data corruption, packet loss, or timeout scenarios
Strong software development skills in: C++ for performance-critical tools and validation components Python for automation, orchestration, and data analysis UNIX/Linux shell scripting for system control and diagnostics
Proven experience building and maintaining CI/CD pipelines for: Large-scale system validation Automated regression testing Continuous integration across hardware and software changes
Demonstrated ability to operate in a fast-paced, high-demand environment where rapid triage, decision-making, and execution are required
Deep experience in system-level engineering with accelerators, GPUs, or complex compute platforms

Responsibilities

Define and execute solutions for system integration and validation for AMD GPU platforms across: Single-GPU and multi-GPU nodes Scale-up fabrics (e.g., multi-GPU interconnects) Scale-out clusters and rack-level deployments
Develop and execute solutions which drive scale up and scale out fabric, including: GPU topology validation PCIe, memory integration with the fabric stress testing Fabric related Driver, firmware, and OS interaction validation Performance and stability testing under real workloads as well Synthesizing down real world test into smaller repeatable test
Lead deep system-level debug efforts, including: GPU hangs, resets, and error recovery scenarios at scale RDMA and networking-related data integrity or performance issues Multi-node synchronization and scaling failures Long-haul stability issues seen in burn-in or customer environments
Collaborate closely with Architecture, Design, and Software Engineering teams to: Improve test hooks, telemetry, and debug visibility Provide feedback for future silicon, firmware, and platform features Ensure system-level requirements are addressed early in the design cycle
Design and implement validation infrastructure which Leverages AI automation, including: Automation frameworks and CI/CD pipelines System health monitoring, logging, and failure triage tools AI Automation Test Pipeline