Sr Design Verification Engineer ( Sunnyvale CA - Onsite )

Encore SemiSunnyvale, CA
1d$150,000 - $165,000Onsite

About The Position

We are looking for an experienced Digital ASIC Verification Engineer to verify complex digital systems, including ARM-based CPUs and DSP blocks. You will own the full verification lifecycle, from test planning to coverage closure using SystemVerilog and UVM.

Requirements

  • 10+ years of ASIC verification experience
  • Strong skills in SystemVerilog, UVM, and constrained random verification
  • Familiarity with ARM/CPU architecture and OOP concepts
  • Proficiency in Python scripting (MATLAB a plus)
  • Bachelors in EE/CS/CE (Master’s preferred)

Responsibilities

  • Develop UVM/SystemVerilog testbenches for block and system-level verification
  • Create and execute test plans; drive functional and code coverage closure
  • Automate test generation and regressions using Python and MATLAB
  • Support pre-silicon verification and post-silicon bring-up
  • Collaborate across teams to ensure design quality and integrity

Benefits

  • 15 days of PTO per calendar year
  • 10 paid Holidays per calendar year
  • Comprehensive Medical Benefits: Company covers 80% of premiums for Employee and Dependents
  • Dental & Vision: Company covers 50% of premiums for Employee and Dependents
  • Voluntary Benefits: Life Insurance, FSA (Health and Dependent, Limited Purpose), HAS, and Gap Insurance
  • Employee Assistant Program (EAP)
  • 401k - Traditional & Roth
  • Life/AD&D and Long-Term Disability
  • Tuition reimbursement
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