About the position
At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We’ve only begun to scratch the surface of Starlink’s potential global impact are looking for best-in-class engineers to help maximize Starlink’s utility for communities and businesses around the globe. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation FPGAs and ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.
Responsibilities
- Responsible for digital ASIC and/or FPGA verification at block and system level
- Write and review test plans, develop test harnesses and test sequences
- Responsible for test plan execution, running regressions, code and functional coverage closure
- Contribute towards pre-silicon verification, chip bring-up and post-silicon validation
- Be a hands-on self-starter who can execute the steps required to fully verify a complex digital designs
Requirements
- Bachelor’s degree in electrical engineering or computer engineering
- 8+ years of experience with design verification and test bench development
Nice-to-haves
- Advanced degree in electrical engineering or computer engineering
- Experience with verification methodologies such as UVM/OVM/VMM
- Strong object-oriented programming knowledge
- Strong problem-solving and coding skills
- Experience in constrained random verification
- Expertise in developing test plans, implementing coverage models, and analyzing results
- Experience with scripting languages, e.g. Python for automation
- RTL design, chip bring-up, and post-silicon validation experience
- Ability to work in a dynamic environment with changing needs and requirements
Benefits
- Pay range: $160,000.00 - $220,000.00/per year
- Long-term incentives, in the form of company stock, stock options, or long-term cash awards
- Potential discretionary bonuses
- Ability to purchase additional stock at a discount through an Employee Stock Purchase Plan
- Comprehensive medical, vision, and dental coverage
- Access to a 401(k) retirement plan
- Short & long-term disability insurance
- Life insurance
- Paid parental leave
- Various other discounts and perks
- 3 weeks of paid vacation
- 10 or more paid holidays per year
- 5 days of sick leave per year
