Sr. Analog/Mixed-Signal Design Engineer

Rambus-posted 1 day ago
$112,000 - $208,000/Yr
Full-time • Mid Level
Hybrid • San Jose, CA
251-500 employees
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Build the Future of Tech with Rambus Engineering! At Rambus, we don’t just follow innovation—we lead it. Our engineering teams are at the forefront of high-performance memory interfaces , cutting-edge security solutions , and advanced semiconductor technologies . As we expand our reach across AI , Data Centers , and Next-Gen Computing , we’re looking for brilliant minds ready to tackle the toughest challenges in tech. Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Sr. Analog/Mixed-Signal Design Engineer to join our Memory Interconnect Design team in San Jose, California. You will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. As an Analog/Mixed-Signal Design Engineer, you will play a pivotal role in product designs. Enjoy the best of both worlds with our hybrid role working alongside top talent in cutting-edge facilities while enjoying the vibrant lifestyle, innovation & energy of Silicon Valley!

  • Ownership of Analog/Mixed designs at chip and/or block level
  • Implement optimal circuit architectures to achieve competitive product specifications
  • Design, simulate and characterize high-performance and high-speed circuits (e.g. Transmitter, Receiver, ADC, DAC, LDO, PLL, DLL, PI circuits).
  • Create floorplan and work with layout team to demonstrate post extraction performance
  • Document analysis and simulation to show that design achieves critical electrical, timing parameters and pre-silicon verification flow
  • Work with the Lab/System team for test plan, silicon bring up and characterization
  • Create behavior model for verification simulations
  • MS EE and 2+ years or PhD EE in CMOS analog/mixed-signal circuit design.
  • Prior work experience or research thesis in at least one of the following circuits : Transmitter, Receiver (with CTLE, DFE), PLL, DLL, PI, clock distribution
  • Good knowledge of design principles for practical design tradeoffs
  • Fundamental knowledge of basic building blocks like bias, op-amps
  • The position requires good written & verbal communication skills as well a strong commitment and ability to work in cross functional and globally dispersed teams
  • Experience in designing memory interfaces such as DDR 4/5 or serial links such as PCIE is highly desirable
  • Prior experience or course work in FinFET process and digitally assisted design is desirable
  • Experience in modeling with matlab, Verilog-A, verilog is desirable
  • Experience working in leading R&D and future technology development projects is desirable
  • Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership.
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