Sr Analog IC Design Engineer

Rambus•Agoura Hills, CA

10d•$130,400 - $242,200•Hybrid

About The Position

Are you ready to shape the future of high-performance computing? Rambus, a global leader in chip and silicon IP solutions, is looking for a Senior Analog IC Design Engineer to join our cutting-edge Bufferchip Design team in Agoura Hills, California. At Rambus, you’ll collaborate with some of the brightest minds in the industry—visionaries and inventors who are redefining how data moves and stays secure. In this highly visible role, you’ll play a key part in defining and designing next-generation products that power the world’s most advanced systems. Why Join Us? Impactful Work: Be at the forefront of innovation, contributing to products that make data faster and safer. Collaborative Culture: Work across Rambus sites with top-tier engineers in a supportive, idea-driven environment. Flexible Hybrid Schedule: Enjoy the best of both worlds with our hybrid work model—spend at least three days a week onsite in Agoura Hills and work remotely for the rest. Career Growth: Take your career to the next level with opportunities for advancement and continuous learning. If you're passionate about analog IC design and ready to make a real impact, we want to hear from you. Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems.

Requirements

MS EE and 5+ years or PhD EE and 2+ years’ experience of CMOS analog circuit design. Position may be tailored appropriately with different level of experience.
Prior experience in at least one of the following circuits: Transmitter, Receiver (with CTLE, DFE), PLL, DLL, PI, clock distribution
Good knowledge of design principles for practical design tradeoffs
Fundamental knowledge of basic building blocks like bias, op-amp and LDO
The position requires good written & verbal communication skills as well a strong commitment and ability to work in cross functional and globally dispersed teams

Nice To Haves

Experience in designing memory interfaces such as DDR 4/5 or serial links such as PCIE is highly desirable
Prior design experience in FinFET process and digitally assisted design is desirable
Experience in modeling with matlab, Verilog-A, verilog is desirable
Experience working in leading R&D and future technology development projects is desirable

Responsibilities

Ownership of Analog designs at chip and/or block level
Define optimal architectures to achieve competitive product specifications
Design, simulate and characterize high-performance and high-speed circuits (e.g. Transmitter, Receiver, ADC, DAC, LDO, PLL, DLL, PI circuits).
Create high level model for design tradeoff analysis and behavior model for verification simulations
Create floorplan and work with layout team to demonstrate post extraction performance
Document analysis and simulation to show that design achieves critical electrical, timing parameters and pre-silicon verification flow
Work with the Lab/System team for test plan, silicon bring up and characterization
Understand and disseminate applicable standards and its relevance in a given project to the team
Mentor junior designers

Benefits

Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program and gym membership.

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